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TLC2202Y

Texas Instruments
Part Number TLC2202Y
Manufacturer Texas Instruments
Description Operational Amplifiers
Published Feb 21, 2020
Detailed Description TLC220x, TLC220xA, TLC220xB, TLC220xY Advanced LinCMOS LOWĆNOISE PRECISION OPERATIONAL AMPLIFIERS SLOS175B − FEBRUARY 1...
Datasheet PDF File TLC2202Y PDF File

TLC2202Y
TLC2202Y


Overview
TLC220x, TLC220xA, TLC220xB, TLC220xY Advanced LinCMOS LOWĆNOISE PRECISION OPERATIONAL AMPLIFIERS SLOS175B − FEBRUARY 1997 − REVISED JANUARY 2008 VVnn− Equivalent Input Noise Voltage − nV/ HzHz D B Grade Is 100% Tested for Noise 30 nV/√Hz Max at f = 10 Hz 12 nV/√Hz Max at f = 1 kHz D Low Input Offset Voltage .
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500 µV Max D Excellent Offset Voltage Stability With Temperature .
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5 µV/°C Typ D Rail-to-Rail Output Swing description The TLC220x, TLC220xA, TLC220xB, and TLC220xY are precision, low-noise operational amplifiers using Texas Instruments Advanced LinCMOS process.
These devices combine the noise performance of the lowest-noise JFET amplifiers with the dc precision available previously only in bipolar amplifiers.
The Advanced LinCMOS process uses silicon-gate technology to obtain input offset voltage stability with temperature and time that far exceeds that obtainable using metal-gate technology.
In addition, this technology makes possible input impedance levels that meet or exceed levels offered by top-gate JFET and expensive dielectric-isolated devices.
D Low Input Bias Current 1 pA Typ at TA = 25°C D Common-Mode Input Voltage Range Includes the Negative Rail D Fully Specified For Both Single-Supply and Split-Supply Operation TYPICAL EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 60 VDD = 5 V RS = 20 Ω 50 TA = 25°C 40 30 20 10 The combination of excellent DC and noise performance with a common-mode input voltage range that includes the negative rail makes these devices an ideal choice for high-impedance, low-level signal-conditioning applications in either single-supply or split-supply configurations.
0 1 10 100 1 k 10 k f − Frequency − Hz The device inputs and outputs are designed to withstand −100-mA surge currents without sustaining latch-up.
In addition, internal ESD-protection circuits prevent functional failures at voltages up to 2000 V as tested under MIL-PRF-38535, Method 3015.
2; however, care should be exercised in handling these device...



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