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CD74HC373E

Texas Instruments
Part Number CD74HC373E
Manufacturer Texas Instruments
Description OCTAL TRANSPARENT D-TYPE LATCHES
Published Apr 20, 2021
Detailed Description CD54HC373, CD74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS452A – FEBRUARY 2001 – REVISED APRIL 2003...
Datasheet PDF File CD74HC373E PDF File

CD74HC373E
CD74HC373E

Overview
CD54HC373, CD74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS452A – FEBRUARY 2001 – REVISED APRIL 2003 D 2-V to 6-V VCC Operation D Wide Operating Temperature Range of –55°C to 125°C D Balanced Propagation Delays and Transition Times D Standard Outputs Drive up to 15 LS-TTL Loads D Significant Power Reduction Compared to LS-TTL Logic ICs description/ordering information The ’HC373 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation.
CD54HC373 .
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F PACKAGE CD74HC373 .
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E OR M PACKAGE (TOP VIEW) OE 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 LE When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs.
When LE is low, the Q outputs are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state.
In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
OE does not affect the internal operations of the latches.
Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – E Tube CD74HC373E CD74HC373E Tube –55°C to 125°C SOIC – M Tape and reel CD74HC373M CD74HC373M96 HC373M CDIP – F Tube CD54HC373F3A CD54HC373F3A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.
ti.
com/sc/package.
Please be aware that an important n...


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