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SN54ABT16827

Texas Instruments
Part Number SN54ABT16827
Manufacturer Texas Instruments
Description 20-BIT BUFFERS/DRIVERS
Published May 20, 2023
Detailed Description D Members of the Texas Instruments Widebus ™ Family D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Pow...
Datasheet PDF File SN54ABT16827 PDF File

SN54ABT16827
SN54ABT16827



Overview
D Members of the Texas Instruments Widebus ™ Family D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 D Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C D High-Impedance State During Power Up and Power Down D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D Flow-Through Architecture Optimizes PCB Layout D High-Drive Outputs (–32-mA IOH, 64-mA IOL) D Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings description The ’ABT16827 are noninverting 20-bit buffers composed of two 10-bit sections with separate output-enable signals.
For either 10-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active.
If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
SN54ABT16827, SN74ABT16827 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS220C – JUNE 1992 – REVISED MAY 1997 SN54ABT16827 .
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WD PACKAGE SN74ABT16827 .
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DL PACKAGE (TOP VIEW) 1OE1 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 1Y5 8 1Y6 9 1Y7 10 GND 11 1Y8 12 1Y9 13 1Y10 14 2Y1 15 2Y2 16 2Y3 17 GND 18 2Y4 19 2Y5 20 2Y6 21 VCC 22 2Y7 23 2Y8 24 GND 25 2Y9 26 2Y10 27 2OE1 28 56 1OE2 55 1A1 54 1A2 53 GND 52 1A3 51 1A4 50 VCC 49 1A5 48 1A6 47 1A7 46 GND 45 1A8 44 1A9 43 1A10 42 2A1 41 2A2 40 2A3 39 GND 38 2A4 37 2A5 36 2A6 35 VCC 34 2A7 33 2A8 32 GND 31 2A9 30 2A10 29 2OE2 When VCC is between 0 and 2.
1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.
1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16827 is characterized for operation o...



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