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74AHC125

NXP
Part Number 74AHC125
Manufacturer NXP
Description Quad buffer/line driver
Published Apr 3, 2005
Detailed Description INTEGRATED CIRCUITS DATA SHEET 74AHC125; 74AHCT125 Quad buffer/line driver; 3-state Product specification Supersedes da...
Datasheet PDF File 74AHC125 PDF File

74AHC125
74AHC125

Overview
INTEGRATED CIRCUITS DATA SHEET 74AHC125; 74AHCT125 Quad buffer/line driver; 3-state Product specification Supersedes data of 1999 Jan 11 File under Integrated Circuits, IC06 1999 Sep 27 Philips Semiconductors Product specification Quad buffer/line driver; 3-state FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt-trigger actions • Inputs accepts voltages higher than VCC • For AHC only: operates with CMOS input levels • For AHCT only: operates with TTL input levels • Specified from −40 to +85 and +125 °C.
DESCRIPTION The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard No.
7A.
The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs.
The 3-state outputs (nY) are controlled by the output enable input (nOE).
A HIGH at n causes the outputs to assume a HIGH-impedance OFF-state.
The ‘125’ is identical to the ‘126’ but has active LOW enable inputs.
74AHC125; 74AHCT125 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.
0 ns.
TYPICAL SYMBOL tPHL/tPLH CI CO CPD PARAMETER propagation delay nA to nY input capacitance output capacitance power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITIONS AHC CL = 15 pF; VCC = 5 V VI = VCC or GND 3.
0 3.
0 4.
0 10 AHCT 3.
0 3.
0 4.
0 12 ns pF pF pF UNIT Notes 1.
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; ∑ (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts.
2.
The condition is VI = GND to VCC.
FUNCTION TABLE See note 1.
INPUT nOE L L H Note 1.
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
nA L H X OUTPUT nY L H Z 19...


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