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74ABT16373

Fairchild Semiconductor
Part Number 74ABT16373
Manufacturer Fairchild Semiconductor
Description 16-Bit Transparent D-Type Latch
Published Apr 3, 2005
Detailed Description 74ABT16373 16-Bit Transparent D-Type Latch with 3-STATE Outputs March 1994 Revised November 1999 74ABT16373 16-Bit Tra...
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74ABT16373
74ABT16373

Overview
74ABT16373 16-Bit Transparent D-Type Latch with 3-STATE Outputs March 1994 Revised November 1999 74ABT16373 16-Bit Transparent D-Type Latch with 3-STATE Outputs General Description The ABT16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications.
The device is byte controlled.
The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH.
When LE is LOW, the data that meets the setup time is latched.
Data appears on the bus when the Output Enable (OE) is LOW.
When OE is HIGH, the outputs are in high Z state.
Features s Separate control logic for each byte s 16-bit version of the ABT373 s High impedance glitch free bus loading during entire power up and power down cycle s Non-destructive hot insertion capability s Guaranteed latch-up protection Ordering Code: Order Number 74ABT16373CSSC 74ABT16373CMTD Package Number MS48A MTD48 Package Description 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.
300” Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.
1mm Wide Devices also available in Tape and Reel.
Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Connection Diagram Pin Descriptions Pin Names OEn LEn D0–D15 O0–O15 Description Output Enable Input (Active LOW) Latch Enable Input Data Inputs Outputs © 1999 Fairchild Semiconductor Corporation DS011666 www.
fairchildsemi.
com 74ABT16373 Functional Description The ABT16373 contains sixteen D-type latches with 3STATE standard outputs.
The device is byte controlled with each byte functioning identically, but independent of the other.
Control pins can be shorted together to obtain full 16-bit operation.
The following description applies to each byte.
When the Latch Enable (LEn) input is HIGH, data on the Dn enters the latches.
In this condition the latches are transparent, i.
e.
, a latch output will change states each time its D input changes.
When LEn is LOW, the latches store informati...


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