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74AC241

Fairchild Semiconductor
Part Number 74AC241
Manufacturer Fairchild Semiconductor
Description Octal Buffer/Line Driver
Published Apr 3, 2005
Detailed Description 74AC241 • 74ACT241 Octal Buffer/Line Driver with 3-STATE Outputs November 1988 Revised November 1999 74AC241 • 74ACT24...
Datasheet PDF File 74AC241 PDF File

74AC241
74AC241

Overview
74AC241 • 74ACT241 Octal Buffer/Line Driver with 3-STATE Outputs November 1988 Revised November 1999 74AC241 • 74ACT241 Octal Buffer/Line Driver with 3-STATE Outputs General Description The AC/ACT241 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus-oriented transmitter or receiver which provides improved PC board density.
Features s ICC and IOZ reduced by 50% s Non-inverting 3-STATE outputs drive bus lines or buffer memory address registers s Outputs source/sink 24 mA s ACT241 has TTL-compatible inputs Ordering Code: Order Number 74AC241SC 74AC241SJ 74AC241MTC 74AC241PC 74ACT241SC 74ACT241SJ 74ACT241MTC 74ACT241PC Package Number M20B M20D MTC20 N20A M20B M20D MTC20 N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.
4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300” Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300” Wide Body 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.
4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300” Wide www.
DataSheet4U.
com Device also avialable in Tape and Reel.
Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions Pin Names OE1 OE2 I0–I7 O0–O7 Description 3-STATE Output Enable Input 3-STATE Output Enable Input (Active HIGH) Inputs Outputs Truth Tables Inputs OE1 In L H X Inputs OE2 H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance FACT is a trademark of Fairchild Semiconductor Corporation.
Outputs (Pins 12, 14, 16, 18) L H Z Outputs In L H X (Pins 3, 5, 7, 9) L H Z Connection Diagram L L H © 1999 Fairchild Semiconductor Corporation DS009942 www.
fairchildsemi.
com 74AC2...


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