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74AC244

Fairchild Semiconductor
Part Number 74AC244
Manufacturer Fairchild Semiconductor
Description Octal Buffer/Line Driver
Published Apr 3, 2005
Detailed Description 74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs January 2008 74AC244, 74ACT244 Octal Buffer/Line Dri...
Datasheet PDF File 74AC244 PDF File

74AC244
74AC244

Overview
74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs January 2008 74AC244, 74ACT244 Octal Buffer/Line Driver with 3-STATE Outputs Features ■ ICC and IOZ reduced by 50% ■ 3-STATE outputs drive bus lines or buffer memory address registers ■ Outputs source/sink 24mA ■ ACT244 has TTL-compatible inputs General Description The AC/ACT244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver which provides improved PC board density.
Ordering Information Order Number Package Number Package Description 74AC244SC 74AC244SJ 74AC244MTC 74AC244PC 74ACT244SC M20B M20D MTC20 N20A M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.
4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300" Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300" Wide 74ACT244SJ 74ACT244MSA 74ACT244MTC 74ACT244PC M20D MSA20 MTC20 N20A 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.
3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.
3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.
4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300" Wide Device also available in Tape and Reel.
Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1988 Fairchild Semiconductor Corporation 74AC244, 74ACT244 Rev.
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fairchildsemi.
com 74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs Connection Diagram Logic Symbol IEEE/IEC Pin Description Pin Names Description OE1, OE2 I0–I7 O0–O7 3-STATE Output Enable Inputs Inputs Outputs Truth Tables Inputs OE1 L In L LH HX Inputs OE2 L In L LH HX X = Immaterial Z = High Impedance Outputs (Pins 12, 14, ...


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