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X25020

Xicor
Part Number X25020
Manufacturer Xicor
Description SPI Serial E2PROM with Block LockTM Protection
Published Apr 16, 2005
Detailed Description APPLICATION NOTES A V A I L A B L E X25020 2K AN9 • AN18 • AN31 • AN37 • AN40 X25020 SPI Serial E2PROM with Block Loc...
Datasheet PDF File X25020 PDF File

X25020
X25020


Overview
APPLICATION NOTES A V A I L A B L E X25020 2K AN9 • AN18 • AN31 • AN37 • AN40 X25020 SPI Serial E2PROM with Block LockTM Protection DESCRIPTION 256 x 8 Bit FEATURES • • • • • • • • • • • 1MHz Clock Rate SPI Modes (0,0 & 1,1) 256 X 8 Bits —4 Byte Page Mode Low Power CMOS —10µA Standby Current —3mA Active Write Current 2.
7V To 5.
5V Power Supply Block Lock Protection —Protect 1/4, 1/2 or all of E2PROM Array Built-in Inadvertent Write Protection —Power-Up/Power-Down protection circuitry —Write Latch —Write Protect Pin Self-Timed Write Cycle —5ms Write Cycle Time (Typical) High Reliability —Endurance: 100,000 cycles per byte —Data Retention: 100 Years —ESD protection: 2000V on all pins 8-Lead PDlP Package 8-Lead SOIC Package The X25020 is a CMOS 2048-bit serial E2PROM, internally organized as 256 x 8.
The X25020 features a serial interface and software protocol allowing operation on a simple three-wire bus.
The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines.
Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.
The X25020 also features two additional inputs that provide the end user with added flexibility.
By asserting the HOLD input, the X25020 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts.
The WP input can be used as a hardwire input to the X25020 disabling all write attempts, thus providing a mechanism for limiting end user capability of altering the memory.
The X25020 utilizes Xicor’s proprietary Direct Write™ cell, providing a minimum endurance of 100,000 cycles per byte and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM STATUS REGISTER WRITE PROTECT LOGIC X DECODE LOGIC 16 SO SI SCK CS HOLD COMMAND DECODE AND CONTROL LOGIC 16 256 BYTE ARRAY 16 X 32 16 X 32 32 32 X 32 WP WRITE CONTROL AND TIMING LOGIC 4 8 Y DECODE DATA REGISTER Direct Write™ and Block Lock™ Protection is a trad...



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