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X25097

Xicor
Part Number X25097
Manufacturer Xicor
Description 5MHz Low Power SPI Serial E 2 PROM with IDLock TM Memory
Published Apr 16, 2005
Detailed Description 8K X25097 DESCRIPTION 1024 x 8 Bit 5MHz Low Power SPI Serial E2PROM with IDLockTM Memory FEATURES • 5MHz Clock Rate •...
Datasheet PDF File X25097 PDF File

X25097
X25097

Overview
8K X25097 DESCRIPTION 1024 x 8 Bit 5MHz Low Power SPI Serial E2PROM with IDLockTM Memory FEATURES • 5MHz Clock Rate • IDLock™ Memory —IDLock First or Last Page, any 1/4 or Lower 1/2 of E2PROM Array • Low Power CMOS —<1µA Standby Current —<3mA Active Current during Write —<400µA Active Current during Read • 1.
8V to 3.
6V, 2.
7V-5.
5V or 4.
5V to 5.
5V Operation • Built-in Inadvertent Write Protection —Power-Up/Power-Down Protection Circuitry —Write Enable Latch —Write Protect Pin • SPI Modes (0,0 & 1,1) • 1024 x 8 Bits —16 Byte Page Mode • Self-Timed Write Cycle —5ms Write Cycle Time (Typical) • High Reliability —Endurance: 100,000 Cycles/Byte —Data Retention: 100 Years —ESD: 2000V on all pins • 8-Lead TSSOP Package • 8-Lead SOIC Package • 8-Lead PDIP Package The X25097 is a CMOS 8K-bit serial E2PROM, internally organized as 1024 x 8.
The X25097 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus.
The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines.
Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.
IDLock is a programmble locking mechanism which allows the user to lock system ID and parametric data in different portions of the E 2 PROM memory space, ranging from as little as one page to as much as 1/2 of the total array.
The X25097 also features a WP pin that can be used for hardwire protection of the part, disabling all write attempts, as well as a Write Enable Latch that must be set before a write operation can be initiated.
The X25097 utilizes Xicor’s proprietary Direct WriteTM cell, providing a minimum endurance of 100,000 cycles per byte and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM SI SO COMMAND DECODE AND CONTROL LOGIC DATA REGISTER Y DECODE LOGIC 16 SCK X DECODE LOGIC 64 8 8K E2PROM ARRAY (1024 x 8) CS WP WRITE CONTROL LOGIC HIGH VOLTAGE CONTROL 7038 FRM F01 ©Xicor, Inc...


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