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MC10EP131

ON Semiconductor
Part Number MC10EP131
Manufacturer ON Semiconductor
Description ECL Quad D Flip-Flop
Published Apr 26, 2005
Detailed Description 3.3 V/5 V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock MC10EP131, MC100EP131 Description The MC10/100EP...
Datasheet PDF File MC10EP131 PDF File

MC10EP131
MC10EP131

Overview
3.
3 V/5 V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock MC10EP131, MC100EP131 Description The MC10/100EP131 is a Quad Master−slaved D flip−flop with common set and separate resets.
The device is an expansion of the E131 with differential common clock and individual clock enables.
With AC performance faster than the E131 device, the EP131 is ideal for applications requiring the fastest AC performance available.
Each flip−flop may be clocked separately by holding Common Clock (CC) LOW and CC HIGH, then using the differential Clock Enable inputs for clocking (C0−3, C0−3).
Common clocking is achieved by holding the differential inputs C0−3 LOW and C0−3 HIGH while using the differential Common Clock (CC) to clock all four flip−flops.
When left floating open, any differential input will disable operation due to input pulldown resistors forcing an output default state.
Individual asynchronous resets (R0−3) and an asynchronous set (SET) are provided.
Data enters the master when both CC and C0−3 are LOW, and transfers to the slave when either CC or C0−3 (or both) go HIGH.
The 100 Series contains temperature compensation.
Features • 460 ps Typical Propagation Delay • Maximum Frequency > 3 GHz Typical • Differential Individual and Common Clocks • Individual Asynchronous Resets • Asynchronous Set • PECL Mode Operating Range: VCC = 3.
0 V to 5.
5 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.
0 V to −5.
5 V • Open Input Default State • Safety Clamp on Inputs • Q Output Will Default LOW with Inputs Open or at VEE • Pb−Free Packages are Available www.
onsemi.
com LQFP−32 FA SUFFIX CASE 561AB MARKING DIAGRAM* MCxxx EP131 AWLYYWWG xxx = 10 or 100 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION Device Package Shipping† MC10EP131FAG LQFP−32 250 Units / Tray (Pb−Fre...


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