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74LVC86

NXP
Part Number 74LVC86
Manufacturer NXP
Description Quad 2-input EXCLUSIVE-OR gate
Published Mar 22, 2005
Detailed Description INTEGRATED CIRCUITS 74LVC86 Quad 2-input EXCLUSIVE-OR gate Product specification Supersedes data of February 1996 IC24 ...
Datasheet PDF File 74LVC86 PDF File

74LVC86
74LVC86


Overview
INTEGRATED CIRCUITS 74LVC86 Quad 2-input EXCLUSIVE-OR gate Product specification Supersedes data of February 1996 IC24 Data Handbook 1997 Mar 18 Philips Semiconductors Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LVC86 FEATURES • Wide supply voltage range of 1.
2 to 3.
6 V • In accordance with JEDEC standard no.
8-1A.
• Inputs accept voltages up to 5.
5 V • CMOS low power consumption • Direct interface with TTL levels QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.
5 ns SYMBOL tPHL tPLH CI CPD PARAMETER Propagation delay nA, nB to nY Input capacitance Power dissipation capacitance per gate DESCRIPTION The 74LVC86 is a high-performance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.
3 V or 5 V devices.
This feature allows the use of these devices as translators in a mixed 3.
3 V/5 V environment.
The 74LVC86 provides the 2-input EXCLUSIVE-OR function.
CONDITIONS CL = 15 pF; VCC = 3.
3 V VCC = 3.
3 V, VI = GND to VCC1 TYPICAL 3.
7 5.
0 55 UNIT ns pF pF NOTE: 1.
CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi )Σ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; Σ (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C OUTSIDE NORTH AMERICA 74LVC86 N 74LVC86 D 74LVC86 DB 74LVC86 PW NORTH AMERICA 74LVC86 N 74LVC86 D 74LVC86 DB 74LVC86PW DH PKG.
DWG.
# SOT27-1 SOT108-1 SOT337-1 SOT402-1 PIN CONFIGURATION 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4B 4A 4Y 3B 3A 3Y LOGIC SYMBOL (IEEE/IEC) 1 2 =1 3 4 5 =1 6 9 10 =1 8 12 SV00481 13 =1 11 PIN DESCRIPTION PIN NUMBER 1, 4, 9, 12 2, 5, 10, 13 ...


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