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NJU3553

New Japan Radio
Part Number NJU3553
Manufacturer New Japan Radio
Description 4-BIT SINGLE CHIP OTP MICRO CONTROLLER
Published May 7, 2005
Detailed Description NJU3553 PRELIMINARY 4-BIT SINGLE CHIP OTP MICRO CONTROLLER s GENERAL DESCRIPTION The NJU3553 is the C-MOS 4-bit Single ...
Datasheet PDF File NJU3553 PDF File

NJU3553
NJU3553


Overview
NJU3553 PRELIMINARY 4-BIT SINGLE CHIP OTP MICRO CONTROLLER s GENERAL DESCRIPTION The NJU3553 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory.
It is completely compatible with the NJU3503 in function and the pin configuration.
Therefore, the NJU3553 is suitable for the final evaluation before NJU3503 mask generation, the small quantity production and short leadtime.
* In this data sheet, only OTP programming and the difference between NJU3553 and NJU3503 are mentioned mainly.
Therefore the detail function and specification should be referred on the NJU3503 data sheet.
s PACKAGE OUTLINE NJU3553L NJU3553M s FEATURES q q q q q Internal One Time Programmable ROM 2,048 X 8bits Internal Data RAM 128 X 4bits Wide operating voltage range 2.
7V ~ 5.
5V Package outline SDIP28 / SDMP30 (Compatible with NJU3503) ROM programmer “SUPERPRO/L” by XELTEK co,.
s PIN CONFIGURATION IN OTP PROGRAMMING MODE [ SDIP28 ] [ SDMP30 ] D3 D4 D5 D6 D7 VDD CNT1 CNT2 1 2 3 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD RESET D2 D1 D0 D3 D4 D5 Open D6 D7 VDD CNT1 CNT2 7 8 9 10 11 12 13 VSS 14 NJU3553L 5 6 Open Open Open PROM REQ CLK VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 VDD RESET D2 D1 D0 NJU3553M Open PROM Open REQ CLK Note) The pin configuration in Normal operating mode is the same as NJU3503.
-1- NJU3553 s BLOCK DIAGRAM -2NJU3553 Interrupt CPU CORE Logic VDD VSS INT1 EXTI/PF0 INT2 TIMER1 STACK X Reg Y Reg AC TEST RESET INT3 CNTI/PF1 TIMER2 X’ Reg MUX Y’ Reg TLU addr PC INT4 SDO/PG0 PRESCALER SDI(O)/PG1 SIO SCK/CKOUT OTP ROM ALU CPU TIMING GENERATOR 2048 x 8 bits AIN0/PD0 OSC OSC1 OSC2 AIN1/PD1 AIN2/PD2 AIN3/PD3 IR RAM 128 x 4 bits ID AIN4/PE0 STANDBY CONTROLLER A/D AIN5/PE1 PE2 VREF/PC1 ADCK/PC0 AVDD PORT_A PORT_B PA0 PA1 PA2 PA3 PB0 PB1 PB2 * Refer [INPUT OUTPUT TERMINAL TYPE] NJU3553 s TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE No.
NJU ...



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