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TC74AC10FN

Toshiba Semiconductor
Part Number TC74AC10FN
Manufacturer Toshiba Semiconductor
Description Triple 3-Input NAND Gate
Published Aug 25, 2006
Detailed Description TC74AC10P/F/FN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC10P,TC74AC10F,TC74AC10FN Triple 3-Input...
Datasheet PDF File TC74AC10FN PDF File

TC74AC10FN
TC74AC10FN


Overview
TC74AC10P/F/FN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC10P,TC74AC10F,TC74AC10FN Triple 3-Input NAND Gate The TC74AC10 is an advanced high speed CMOS 3-INPUT NAND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
Features • High speed: tpd = 5.
0 ns (typ.
) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
• Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 5.
5 V • Pin and function compatible with 74F10 Pin Assignment Note: xxxFN (JEDEC SOP) is not available in Japan.
TC74AC10P TC74AC10F TC74AC10FN Weight DIP14-P-300-2.
54 SOP14-P-300-1.
27A SOL14-P-150-1.
27 : 0.
96 g (typ.
) : 0.
18 g (typ.
) : 0.
12 g (typ.
) Downloaded from Elcodis.
com electronic components distributor 1 2007-10-01 IEC Logic Symbol TC74AC10P/F/FN Truth Table ABC LXX XLX XXL HHH X: Don’t care Y H H H L Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature VCC VIN VOUT IIK IOK IOUT ICC PD Tstg −0.
5 to 7.
0 −0.
5 to VCC + 0.
5 −0.
5 to VCC + 0.
5 ±20 ±50 ±50 ±100 500 (DIP) (Note 2)/180 (SOP) −65 to 150 V V V mA mA mA mA mW °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.
Using continuously under heavy loads ...



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