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MB91121

Fujitsu Media Devices
Part Number MB91121
Manufacturer Fujitsu Media Devices
Description 32-bit RISC Microcontroller
Published Oct 16, 2006
Detailed Description www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16303-2E 32-bit RISC Microcontroller CMOS FR30 Series MB91...
Datasheet PDF File MB91121 PDF File

MB91121
MB91121

Overview
www.
DataSheet4U.
com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16303-2E 32-bit RISC Microcontroller CMOS FR30 Series MB91121 MB91121 s DESCRIPTION The MB91121 is a microcontroller with a 32-bit RISC CPU (FR family *) as the core, incorporating a variety of I/O resources, a bus control facility, and a multiplier-accumulator (simplified DSP) with internal program RAM for built-in control applications which require advanced, high-speed CPU processing.
While being based on external bus access for supporting a vast address space accessed by the 32-bit CPU, it contains 1 K bytes of instruction cache memory and 4 K bytes of RAM (8 K bytes when the DSP is not used) for speeding up the execution of instructions by the CPU.
In this way, the device is designed for built-in applications which require high performance and processing power of the CPU, such as digital camera, navigation system, and high-performance FAX, and printer controls.
* : FR Family stands for FUJITSU RISC controller.
s FEATURES 1.
FR CPU • • • • • 32-bit RISC, load/store architecture, 5-stage pipeline Operating clock frequency : Internal 50 MHz/external 25 MHz (PLL used at source oscillation 12.
5 MHz) General purpose registers : 32 bits × 16 16-bit fixed length instructions (basic instructions) , 1 instruction/1 cycle Memory to memory transfer, bit processing, barrel shifter processing : Optimized for embedded applications (Continued) s PACKAGE 120-pin plastic LQFP (FPT-120P-M21) DataSheet 4 U .
com www.
DataSheet4U.
com MB91121 (Continued) • Function entrance/exit instructions, multiple load/store instructions of register contents, instruction systems supporting high level languages • Register interlock functions, efficient assembly language coding • Branch instructions with delay slots : Reduced overhead time in branch executions • Internal multiplier/supported at instruction level Signed 32-bit multiplication : 5 cycles Signed 16-bit multiplication : 3 cycles • Interrupt (push PC and PS) : 6 cycles, 16...


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