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MB91F133

Fujitsu Media Devices
Part Number MB91F133
Manufacturer Fujitsu Media Devices
Description 32-Bit RISC Microcontroller
Published Oct 16, 2006
Detailed Description www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16308-1E 32-Bit RISC Microcontroller CMOS FR30 Series MB9...
Datasheet PDF File MB91F133 PDF File

MB91F133
MB91F133


Overview
www.
DataSheet4U.
com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16308-1E 32-Bit RISC Microcontroller CMOS FR30 Series MB91133/MB91F133 s DESCRIPTION The MB91133/MB91F133, a standard single-chip microcontroller featuring various I/O resources and bus control mechanisms to incorporate the control required for high-performance high-speed CPU processes, is the core unit in the 32-bit RISC CPU (FR family) .
This unit has the optimal specifications for incorporating applications that require high-performance CPU processing power by featuring peripheral I/O resources suitable for single-lens reflex cameras, digital video cameras, etc.
s FEATURES 1.
CPU • • • • • • • • • • • 32-bit RISC (FR30) , load/store architecture, 5-level pipeline Multi-purpose register : 32 bits × 16 16-bit fixed length instructions (basic instructions) , 1 instruction per cycle Instructions for barrel shift, bit processing and inter-memory transfers : Instructions suited to loading purposes Function entry / exit instruction, multi load / store instruction of register details : High-level language handling instruction Register interlock function : Simplification of assembler description Branch instruction with delay slot : Reduction in overheads in case of branching Multiplier is built-in / supported at instruction level.
Signed 32-bit multiplication : 5 cycles Signed 16-bit multiplication : 3 cycles Interruption (saving PC and PS) : 6 cycles, 16 priority levels (Continued) s PACKAGES 144-pin plastic FBGA 144-pin plastic LQFP (BGA-144P-M01) (FPT-144P-M08) DataSheet 4 U .
com www.
DataSheet4U.
com MB91133/MB91F133 (Continued) 2.
Bus Interface • • • • • 24-bit address output, 8/16-bit data input/output Basic bus cycle : 2 clock cycles Interface support for various memories Unused data and address pins can be used as input/output ports.
Supports “little endian” mode 3.
Built-in ROM Mask device : 254 KB; FLASH device : 254 KB; EVA-FLASH device : 254 KB 4.
Built-in RAM Mask device : 8 KB; FLASH devi...



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