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NID5001N

ON Semiconductor
Part Number NID5001N
Manufacturer ON Semiconductor
Description Self-protected FET
Published Jan 17, 2007
Detailed Description www.DataSheet4U.com NID5001N Preferred Device Self−protected FET with Temperature and Current Limit HDPlus devices are...
Datasheet PDF File NID5001N PDF File

NID5001N
NID5001N

Overview
www.
DataSheet4U.
com NID5001N Preferred Device Self−protected FET with Temperature and Current Limit HDPlus devices are an advanced series of power MOSFETs which utilize ON Semicondutor’s latest MOSFET technology process to achieve the lowest possible on−resistance per silicon area while incorporating smart features.
Integrated thermal and current limits work together to provide short circuit protection.
The devices feature an integrated Drain−to−Gate Clamp that enables them to withstand high energy in the avalanche mode.
The Clamp also provides additional safety margin against unexpected voltage transients.
Electrostatic Discharge (ESD) protection is provided by an integrated Gate−to−Source Clamp.
Features http://onsemi.
com VDSS (Clamped) 42 V ID MAX (Limited) 33 A* RDS(ON) TYP 23 mΩ @ 10 V Drain Overvoltage Protection MPWR • • • • • • • • Low RDS(on) Current Limitation Thermal Shutdown with Automatic Restart Short Circuit Protection IDSS Specified at Elevated Temperature Avalanche Energy Specified Slew Rate Control for Low Noise Switching Overvoltage Clamped Protection Gate Input RG ESD Protection Temperature Limit Current Limit Current Sense Source MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Internally Clamped Drain−to−Gate Voltage Internally Clamped (RGS = 1.
0 MW) Gate−to−Source Voltage Drain Current Continuous Symbol VDSS VDGR VGS ID PD 64 1.
0 1.
56 RqJC RqJA RqJA EAS 1.
95 120 80 1215 °C/W Value 42 42 "14 Unit Vdc Vdc Vdc NID5001N = Device Code Y = Year WW = Work Week DPAK CASE 369C STYLE 2 1 2 3 MARKING DIAGRAM YWW X NID 5001N Internally Limited W 1 = Gate 2 = Drain 3 = Source Total Power Dissipation @ TA = 25°C (Note 1) @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) Thermal Resistance − Junction−to−Case Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2) Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 Vdc, VGS = 5.
0 Vdc, IL = 4.
5 Apk, L = 120 mH, RG = 25 W) Operating and Storage Temperature R...


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