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ZL30109

Zarlink Semiconductor
Part Number ZL30109
Manufacturer Zarlink Semiconductor
Description DS1/E1 System Synchronizer
Published Feb 11, 2007
Detailed Description ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features April 2010 • Supports Telcordia GR-1244-...
Datasheet PDF File ZL30109 PDF File

ZL30109
ZL30109


Overview
ZL30109 DS1/E1 System Synchronizer with 19.
44 MHz Output Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.
823 and G.
824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.
403 and ETSI ETS 300 011 for ISDN primary rate interfaces Ordering Information ZL30109QDG1 64 pin TQFP* Trays, Bake & Drypack *Pb Free Matte Tin -40°C to +85°C • Simple hardware control interface • Accepts two input references and synchronizes to any combination of 2 kHz, 8 kHz, 1.
544 MHz, 2.
048 MHz, 8.
192 MHz, 16.
384 MHz or 19.
44 MHz inputs • Provides a range of clock outputs: 1.
544 MHz, 2.
048 MHz, 16.
384 MHz, 19.
44 MHz and either 4.
096 MHz and 8.
192 MHz or 32.
768 MHz and 65.
536 MHz • Hitless reference switching between any combination of valid input reference frequencies • Provides 5 styles of 8 kHz framing pulses and a 2 kHz multi-frame pulse • Holdover frequency accuracy of 1.
5 x 10-7 • Lock, Holdover and selectable Out of Range indication • Selectable loop filter bandwidth of 1.
8 Hz or 922 Hz • Less than 24 psrms intrinsic jitter on the 19.
44 MHz output clock, compliant with OC-3 and STM-1 jitter specifications • Less than 0.
6 nspp intrinsic jitter on all output clocks • External master clock source: clock oscillator or crystal Applications • Synchronization and timing control for DSLAM, Gateway and PBX systems that require Stratum 4/4E timing • Line Card synchronization for SDH/PDH applications • Clock and frame pulse source for ST-BUS, GCI and other time division multiplex (TDM) buses REF0 REF1 REF_FAIL0 REF_FAIL1 OOR_SEL REF_SEL RST OSCi OSCo TIE_CLR BW_SEL LOCK OUT_SEL Master Clock MUX TIE Corrector Circuit Virtual Reference DPLL E1 Synthesizer Reference Monitor TIE Corrector Enable State Machine Mode Control Feedback Frequency Select MUX DS1 Synthesizer SONET/SDH Synthesizer IEEE 1149.
1a C2o C4/C65o C8/C32o C16o F4/F65o F8/F32o F16o C1.
5o C19o F2ko TRST MODE_SEL1:0 HMS HOLDOVER TCK TDI TMS TDO F...


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