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MC100EP140

ON Semiconductor
Part Number MC100EP140
Manufacturer ON Semiconductor
Description ECL Phase-Frequency Detector
Published Apr 16, 2007
Detailed Description 3.3V ECL Phase-Frequency Detector MC100EP140 Description The MC100EP140 is a three state phase frequency−detector intend...
Datasheet PDF File MC100EP140 PDF File

MC100EP140
MC100EP140

Overview
3.
3V ECL Phase-Frequency Detector MC100EP140 Description The MC100EP140 is a three state phase frequency−detector intended for phase−locked loop applications which require a minimum amount of phase and frequency difference at lock.
Since the part is designed with fully differential internal gates, the noise is reduced throughout the circuit, especially at high speeds.
The basic operation of a Phase/Frequency Detector (PFD) is to “compare” an incoming signal (feedback) to a set reference signal.
When the Reference (R) and Feedback (FB) inputs are unequal in frequency and/or phase, the differential UP (U) and DOWN (D) outputs will provide pulse streams which, when subtracted and integrated, provide an error voltage for control of a VCO.
Detector states of operation are shown in the Figure 2 and the State Table.
The typical output amplitude of the EP140 is 400 mV, allowing faster switching time and greater bandwidth.
For proper operation, the input edge rate of the R and FB inputs should be less than 5 ns.
More information on Phase Lock Loop operation and application can be found in AND8040.
The pinout is shown in Figure 1, the logic diagram in Figure 3, and the typical termination in Figure 5.
Features • 500 ps Typical Propagation Delay • Maximum Frequency > 2.
1 GHz Typical • Fully Differential Internally • Advanced High Band Output Swing of 400 mV • Transfer Gain: 1.
0 mV/Degree at 1.
4 GHz 1.
2 mV/Degree at 1.
0 GHz • Rise and Fall Time: 100 ps Typical • The 100 Series Contains Temperature Compensation • PECL Mode Operating Range: VCC = 3.
0 V to 3.
6 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −3.
0 V to −3.
6 V • Open Input Default State • These are Pb−Free Devices DATA SHEET www.
onsemi.
com 8 1 A L Y W G SOIC−8 D SUFFIX CASE 751 MARKING DIAGRAM 8 KP140 ALYW G 1 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of t...


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