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SY89200U

Micrel Semiconductor
Part Number SY89200U
Manufacturer Micrel Semiconductor
Description Ultra-Precision 1:8 LVDS Fanout Buffer
Published May 2, 2007
Detailed Description SY89200U Ultra-Precision 1:8 LVDS Fanout Buffer with Three ÷1/÷2/÷4 Clock Divider Output Banks Revision 6.0 General Des...
Datasheet PDF File SY89200U PDF File

SY89200U
SY89200U

Overview
SY89200U Ultra-Precision 1:8 LVDS Fanout Buffer with Three ÷1/÷2/÷4 Clock Divider Output Banks Revision 6.
0 General Description The SY89200U is a 2.
5V precision, high-speed, integrated clock divider and LVDS fanout buffer capable of handling clocks up to 1.
5GHz.
Optimized for communications applications, the three independently controlled output banks are phase matched and can be configured for pass through (÷1), ÷2 or ÷4 divider ratios.
The differential input includes Micrel’s unique, 3-pin input termination architecture that allows the user to interface to any differential signal path.
The low-skew, low-jitter outputs are LVDS-compatible with extremely fast rise/fall times guaranteed to be less than 150ps.
The EN (enable) input guarantees that the ÷1, ÷2 and ÷4 outputs will start from the same state without any runt pulse after an asynchronous master rest (MR) is asserted.
This is accomplished by enabling the outputs after a fourclock delay to allow the counters to synchronize.
The SY89200U is part of Micrel’s Precision Edge® product family.
Datasheets and support documentation are available on Micrel’s web site at: www.
micrel.
com.
Functional Block Diagram Precision Edge® Features • Three low-skew LVDS output banks with programmable ÷1, ÷2 and ÷4 divider options • Three independently programmable output banks • Guaranteed AC performance over temperature and voltage: − Accepts a clock frequency up to 1.
5GHz − <900ps IN-to-OUT propagation delay − <150ps rise/fall time − <50ps bank-to-bank phase offset • Ultra-low jitter design: − <1psRMS random jitter − <10psPP total jitter (clock) • Patent-pending input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS) • LVDS-compatible outputs • CMOS/TTL-compatible output enable (EN) and divider select control • 2.
5V ±5% power supply • –40°C to +85°C temperature range • Available in 32-pin (5mm × 5mm) QFN package Applications • All SONET/SD applications • All Fibre Channel applications • All Gigabit Ethe...


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