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MT8931B

Mitel Networks
Part Number MT8931B
Manufacturer Mitel Networks
Description Subscriber Network Interface Circuit
Published Jun 20, 2007
Detailed Description ® CMOS ST-BUS™ FAMILY MT8931B Subscriber Network Interface Circuit Preliminary Information Features • • • • • • • CCIT...
Datasheet PDF File MT8931B PDF File

MT8931B
MT8931B


Overview
® CMOS ST-BUS™ FAMILY MT8931B Subscriber Network Interface Circuit Preliminary Information Features • • • • • • • CCITT I.
430 and ANSI T1.
605 S/T interface Full-duplex 2B+D, 192 kbit/s transmission Link activation/deactivation D-channel access contention resolution Point-to-point, point-to-multipoint and star configurations Master (NT)/Slave (TE) modes of operation Exceeds loop length requirements ISSUE 2 August 1993 Ordering Information MT8931BC 28 Pin Ceramic DIP MT8931BE 28 Pin Plastic DIP MT8931BP 44 Pin PLCC -40°C to +85°C Description The MT8931B Subscriber Network Interface Circuit (SNIC) implements the CCITT I.
430 and ANSI T1.
605 Recommendations for the ISDN S and T reference points.
Providing point-to-point and pointto-multipoint digital transmission, the SNIC may be used at either end of the subscriber line (NT or TE).
www.
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com d e et e d • Complete loopback testing capabilities h n n s e g • On chip HDLC D-channel protocoller i ta m s a • 8 bit Motorola/Intel microprocessor interface m De 1C 1B d • Microprocessor-controlled operation o c ew 893 93 e • Mitel ST-BUS interface 8 D-channel protocoller is included and HDLC R N T An T • Low power CMOS technology t M controlled r e M ullport.
through a Motorola/Intel microprocessor o o • Single 5 volt power supply N f e rf S y fo The MT8931B is fabricated in Mitel’s CMOS process.
Applications • • • • • ISDN NT1 ISDN S or T interface ISDN Terminal Adaptor (TA) Digital sets (TE1) - 4 wire ISDN interface Digital PABXs, Digital Line Cards (NT2) n Co s f t l u a cto r DSTi DSTo ST-BUS Interface D-channel Priority Mechanism LTx S-Bus Link Interface VBias LRx F0od C4b F0b STAR/Rsto XTAL1/NT XTAL2/NC Microprocessor Interface VSS Timing and Control PLL HDLC Transceiver Link Activation Controller VDD Rsti HALF AD0-7 R/W/WR DS/RD AS/ALE CS IRQ/NDA Figure 1 - Functional Block Diagram 10-71 MT8931B Notes: Preliminary Information www.
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com Worl...



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