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SI5020

Silicon Laboratories
Part Number SI5020
Manufacturer Silicon Laboratories
Description SiPHY MULTI-RATE SONET/SDH CLOCK AND DATA RECOVERY IC
Published Jun 29, 2007
Detailed Description Si5020 SiPHY™ M ULTI -R ATE SONET/SDH C LOCK Features Complete high speed, low power, CDR solution includes the followin...
Datasheet PDF File SI5020 PDF File

SI5020
SI5020

Overview
Si5020 SiPHY™ M ULTI -R ATE SONET/SDH C LOCK Features Complete high speed, low power, CDR solution includes the following: ! ! ! ! ! AND D ATA R ECOVERY IC Supports OC-48/12/3, STM-16/4/1, Gigabit Ethernet, and 2.
7 Gbps FEC Low Power—270 mW (TYP OC-48) Small Footprint: 4 mm x 4 mm DSPLL™ Eliminates External Loop Filter Components 3.
3 V Tolerant Control Inputs ! ! ! ! ! Exceeds All SONET/SDH Jitter Specifications Jitter Generation 3.
0 mUIRMS (TYP) Device Power Down Loss-of-Lock Indicator Single 2.
5 V Supply Ordering Information: See page 14.
Applications ! ! ! ! RATESEL1 RATESEL0 CLKOUT+ Description www.
DataSheet4U.
com 20 19 18 REXT GND ! 17 16 15 PWRDN/CAL 14 VDD 1 2 3 4 5 6 LOL The Si5020 is a fully integrated low-power clock and data recovery (CDR) IC designed for high-speed serial communication systems.
It extracts timing information and data from a serial input at OC-48/12/3, STM-16/4/1, or Gigabit Ethernet (GbE) rates.
Support for 2.
7 Gbps data streams is also provided for OC-48/STM-16 applications that employ forward error correction (FEC).
DSPLL™ technology eliminates sensitive noise entry points thus making the PLL less susceptible to board-level interaction and helping to ensure optimal jitter performance.
The Si5020 represents a new standard in low jitter, low power, and small size for high speed CDRs.
It operates from a single 2.
5 V supply over the industrial temperature range (–40°C to 85°C).
VDD GND REFCLK+ REFCLK– GND Pad CLKOUT– SONET/SDH/ATM Routers Add/Drop Multiplexers Digital Cross Connects Gigabit Ethernet Interfaces ! ! ! SONET/SDH Test Equipment Optical Transceiver Modules SONET/SDH Regenerators Board Level Serial Links Pin Assignments Si5020 13 DOUT+ 12 DOUT– 11 VDD 7 VDD 8 GND 9 DIN+ 10 DIN– Top View Functional Block Diagram LOL DIN+ DIN– 2 BUF DSPLL™ Phase-Locked Loop Retimer BUF 2 DOUT+ DOUT– PWRDN/CAL Bias 2 2 BUF 2 CLKOUT+ CLKOUT– REXT RATESEL1–0 REFCLK+ REFCLK– Preliminary Rev.
0.
8 12/00 C...


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