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MITSUBISHI SEMICONDUCTOR <TRANSISTOR ARRAY>
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M63850P/FP
4-UNIT 1. 5A DMOS ARRAY WITH CLAMP DIODE
PIN CONFIGURATION
COM 1 O1← 2 IN1→ 3 GND 16 →O4 15 ←IN4 14 VDD 13 12
DESCRIPTION The M63850P/FP is a inverter input power DMOS transistor array that consists of 4 independent output N-channel DMOS transistors.
4 5
GND
FEATURES 4 circuits of N-channels DMOS High breakdown voltage (VDS ≥ 80V) High-current driving (IDS(max) = 1. 5A) With clamping diodes Drain-source on-state low resistance (RON = 0. 72Ω, @ = 1. 25A) Wide operating temperature range (Ta = –40 to +85°C)
IN2→ 6 NC 7 O2← 8
11 ←IN3 10 →O3 9 COM NC : No connection
Package type 16P4(P) 16P2N(FP)
CIRCUIT DIAGRAM
VDD COM OUTPUT 30k INPUT 4. 2k
APPLICATION Drives of relays and printers, digit drives of indication elements (LEDs and lamps)
GND The four circuits share the COM and GND.
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M63850P PDF File
