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LH532000B-1

Sharp Electrionic Components
Part Number LH532000B-1
Manufacturer Sharp Electrionic Components
Description CMOS 2M (256K x 8/128K x 16) MROM
Published Mar 22, 2005
Detailed Description LH532000B-1 FEATURES • 262,144 words × 8 bit organization (Byte mode) 131,072 words × 16 bit organization (Word mode) • ...
Datasheet PDF File LH532000B-1 PDF File

LH532000B-1
LH532000B-1

Overview
LH532000B-1 FEATURES • 262,144 words × 8 bit organization (Byte mode) 131,072 words × 16 bit organization (Word mode) • Access time: 120 ns (MAX.
) • Power consumption: Operating: 275 mW (MAX.
) Standby: 550 µW (MAX.
) • Mask-programmable control pin (for 40-pin DIP/40-pin SOP): Pin 1 = OE1/OE1/DC Pin 12 = OE/OE • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Packages: 40-pin, 600-mil DIP 40-pin, 525-mil SOP 48-pin, 12 × 18 mm2 TSOP (Type I) DESCRIPTION The LH532000B-1 is a CMOS 2M-bit mask-programmable ROM organized as 262,144 × 8 bits (Byte mode) or 131,072 × 16 bits (Word mode) that can be selected by BYTE input pin.
It is fabricated using silicon-gate CMOS process technology.
CMOS 2M (256K × 8/128K × 16) MROM PIN CONNECTIONS 40-PIN DIP 40-PIN SOP TOP VIEW OE1/OE1/DC A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE/OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE GND D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC 532000B1-1 Figure 1.
Pin Connections for DIP and SOP Packages 1 LH532000B-1 CMOS 2M MROM 48-PIN TSOP (Type I) TOP VIEW BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 NC GND NC NC OE1/OE1/DC A7 A6 A5 A4 A3 A2 A1 A0 CE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 GND GND D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC GND D11 D3 D10 D2 D9 D1 D8 D0 OE/OE GND GND NOTE: Reverse bend available on request.
532000B1-2 Figure 2.
Pin Connections for TSOP Package 2 CMOS 2M MROM LH532000B-1 A16 32 A15 33 A14 34 ADDRESS DECODER A10 38 A9 39 A8 40 A7 2 A6 3 A5 4 A4 5 A3 6 A2 7 A1 8 A0 9 ADDRESS BUFFER A13 35 A12 36 A11 37 MEMORY MATRIX (262,144 x 8 ) (131,072 x 16 ) COLUMN SELECTOR SENSE AMPLIFIER CE 10 CE BUFFER TIMING GENERATOR OE/OE 12 OE1/OE1/DC 1 OE BUFFER DATA SELECTOR/OUTPUT BUFFER BYTE 31 BYTE/WORD SWITCHOVER ...


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