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CY62146E

Cypress Semiconductor
Part Number CY62146E
Manufacturer Cypress Semiconductor
Description 4-Mbit (256K x 16) Static RAM
Published Jan 6, 2011
Detailed Description CY62146E MoBL® 4-Mbit (256 K × 16) Static RAM 4-Mbit (256 K × 16) Static RAM Features ■ Very high speed: 45 ns ■ Wide v...
Datasheet PDF File CY62146E PDF File

CY62146E
CY62146E

Overview
CY62146E MoBL® 4-Mbit (256 K × 16) Static RAM 4-Mbit (256 K × 16) Static RAM Features ■ Very high speed: 45 ns ■ Wide voltage range: 4.
5 V to 5.
5 V ■ Ultra low standby power ❐ Typical standby current: 1 A ❐ Maximum standby current: 7 A ■ Ultra low active power ❐ Typical active current: 2 mA at f = 1 MHz ■ Easy memory expansion with CE and OE features ■ Automatic power down when deselected ■ Complementary metal oxide semiconductor (CMOS) for optimum speed and power ■ Available in Pb-free 44-pin thin small outline package (TSOP) Type II package Functional Description The CY62146E is a high performance CMOS static RAM organized as 256K words by 16 bits.
This device features advanced circuit design to provide ultra low active current.
It is ideal for providing More Battery Life (MoBL®) in portable applications.
The device also has an automatic power down feature that reduces power consumption when addresses are Logic Block Diagram not toggling.
Placing the device into standby mode reduces power consumption by more than 99% when deselected (CE HIGH).
The input and output pins (I/O0 through I/O15) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH) or during a write operation (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW.
If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7) is written into the location specified on the address pins (A0 through A17).
If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A17).
To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH.
If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7.
If Byte High Enable (BH...


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