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CY2XP304

Part Number	CY2XP304
Manufacturer	Cypress Semiconductor
Description	High-Frequency Programmable PECL Clock Generation Module
Published	Jul 30, 2011
Detailed Description	CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features • Period jitter peak-peak 125MHz(max.) = 55 ...
Datasheet	CY2XP304 PDF File

Overview

CY2XP304 High-Frequency Programmable PECL Clock Generation Module Features • Period jitter peak-peak 125MHz(max.
) = 55 ps • Four low-skew LVPECL outputs • Phase-locked loop (PLL) multiplier select • Serially-configurable multiply ratios • Eight-bit feedback counter and six-bit reference counter for high accuracy • HSTL inputs—HSTL-to-LVPECL level translation • 125- to 500-MHz output range for high-speed applications • High-speed PLL bypass mode to 1.
5 GHz • 36-VFBGA, 6 × 8 × 1 mm • 3.
3V operation Block Diagram PLL_MULT CLK0 CLK0B CLK1 XIN XOUT SER CLK SER DATA INA INAB CLK_SEL XTAL OSCILLATOR PLL xM 0 1 CLK1B CLK2 CLK2B CLK3 CLK3B Pin Configuration C Y 2 X P 3 0 4 3 6 V F B G A P IN C O N F IG U R A T IO N T O P V IE W C LK 0 C LK 0B 6 CLK 1 CLK 1B C LK 2 CLK 2B CLK 3 C LK 3B 5 VDDA GND T O P V IE W GND GND GND V DDA 4 GND S E R_D A TA V DDB V DDA 3 Xo u t S E R_CL K GND GND VDDB NC 2 Xi n GND GND VDDA 1 VDDB VDDB GND P LL_M U L T CLK _S E L IN A IN A B VDDA A B C D E F G H www.
DataSheet4U.
net Document #: 38-07589 Rev.
*B Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised July 28, 2004 CY2XP304 Pin Definitions Pin # A1,B1,G3,G4 A2 A3 A4,B2,C1,C3,C4,F3,F4,G2,G5,B5 A5,H1,H2,H4,H5 A6 B6 C6 D6 E6 F6 G6 H6 B3 B4 D1 E1 F1,G1 H3 Pin Name VDDB XIN XOUT GND VDDA CLK0 CLK0B CLK1 CLK1B CLK2 CLK2B CLK3 CLK3B Reference Crystal Input Reference Crystal Feedback Ground 3.
3V Power Supply LVPECL Clock Output LVPECL Clock Output (Complement) LVPECL Clock Output LVPECL Clock Output (Complement) LVPECL Clock Output LVPECL Clock Output (Complement) LVPECL Clock Output LVPECL Clock Output (Complement) Pin Description 3.
3V Power Supply for Crystal Driver SER_CLK Serial Interface Clock SER_DATA Serial Interface Data PLL_MULT PLL Multiplier Select Input, Internal pull-up resistor, see Frequency Table CLK_SEL INA,INAB NC Clock Select Input, Internal Pull down.
HIGH select INA/IN...

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