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ICS8312

Integrated Device Technology
Part Number ICS8312
Manufacturer Integrated Device Technology
Description 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Published Jan 27, 2016
Detailed Description LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER General Description The ICS8312 is a low skew, 1-to-12 LVCMOS/ ICS LVTTL Fa...
Datasheet PDF File ICS8312 PDF File

ICS8312
ICS8312


Overview
LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER General Description The ICS8312 is a low skew, 1-to-12 LVCMOS/ ICS LVTTL Fanout Buffer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from IDT.
The ICS8312 single-ended clock input accepts LVCMOS or LVTTL input levels.
The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines.
The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines.
The ICS8312 is characterized at full 3.
3V, 2.
5V, and 1.
8V, mixed 3.
3V/2.
5V, 3.
3V/1.
8V and 2.
5V/1.
8V output operating supply modes.
Guaranteed output and part-to-part skew characteristics along with the 1.
8V output capabilities makes the ICS8312 ideal for high performance, single ended applications that also require a limited output voltage.
ICS8312 Features • Twelve LVCMOS/LVTTL outputs • CLK input supports the following input types: LVCMOS, LVTTL • Maximum output frequency: 250MHz • Output skew: 150ps (maximum) • Supply modes: Core/Output 3.
3V/3.
3V 3.
3V/2.
5V 3.
3V/1.
8V 2.
5V/2.
5V 2.
5V/1.
8V 1.
8V/1.
8V • 0°C to 85°C ambient operating temperature • Available in both standard (RoHS 5) and lead-free (RoHS 6) packages Block Diagram CLK_EN Pullup D Q LE CLK Pulldown OE Pullup 12 Q[0:11] IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 1 Pin Assignment Q0 VDDO Q1 GND Q2 VDDO Q3 GND GND VDD CLK_EN CLK GND OE VDD GND 32 31 30 29 28 27 26 25 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 10 11 12 13 14 15 16 Q4 VDDO Q5 GND Q6 VDDO Q7 GND Q11 VDDO Q10 GND Q9 VDDO Q8 GND ICS8312 32-Lead LQFP 7mm x 7mm x 1.
4mm package body Y Package Top View ICS8312AY REV.
D JULY 3, 2008 ICS8312 LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER Table 1.
Pin Descriptions Number 1, 5, 8, 12, 16, 17, 21, 25, 29 2, 7 3 Name GND VDD CLK_EN 4 CLK 6 OE 9, 11, 13, 15, 18, 20, 22, 24, 26, 28, 30, 32 10, 14, 19, 23, 27, 31 Q11, Q10, Q9, Q8, Q7, Q6, Q5, Q4, Q3, Q2, Q1, ...



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