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NCP4688

ON Semiconductor
Part Number NCP4688
Manufacturer ON Semiconductor
Description Low Noise LDO Linear Voltage Regulator
Published Feb 4, 2016
Detailed Description NCP4688 Voltage Regulator - Low Noise, LDO Linear 150 mA The NCP4688 is a CMOS 150 mA LDO linear voltage regulator wit...
Datasheet PDF File NCP4688 PDF File

NCP4688
NCP4688


Overview
NCP4688 Voltage Regulator - Low Noise, LDO Linear 150 mA The NCP4688 is a CMOS 150 mA LDO linear voltage regulator with high output voltage accuracy which features a low noise output voltage and high ripple rejection.
The low level of output noise 10 mVrms typically is kept at any output voltage.
The very common SOT23−5 package and small mDFN 1x1 package are suitable for industrial applications, portable communication equipments and RF modules.
Features • Operating Input Voltage Range: 2 V to 5.
25 V • Output Voltage Range: 1.
2 to 4.
8 V (available in 0.
1 V steps) • ±1% Output Voltage Accuracy • Output Noise: 10 mVrms • Line Regulation: 0.
02%/V • Current Limit Circuit • High PSRR: 80 dB at 1 kHz, 75 dB at 10 kHz • Available in SOT−23−5 and mDFN 1.
0 x 1.
0 mm Package • These are Pb−Free Devices Typical Applications • Home Appliances, Industrial Equipment • Cable Boxes, Satellite Receivers, Entertainment Systems • Car Audio Equipment, Navigation Systems • Notebook Adaptors, LCD TVs, Cordless Phones and Private LAN Systems • RF Modules VIN NCP4688x VOUT VIN VOUT C1 1.
0 mF CE GND C2 1.
0 mF http://onsemi.
com MARKING DIAGRAMS SOT−23−5 CASE 1212 XXXMM 1 1 UDFN−4 CASE 517BR XX MG 1G (Top Views) XX, XXX = Specific Device Code M, MM = Date Code G = Pb−Free Package (*Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet.
Figure 1.
Typical Application Schematic © Semiconductor Components Industries, LLC, 2012 October, 2019 − Rev.
1 1 Publication Order Number: NCP4688/D NCP4688xxxx NCP4688 NCP4688D Vin Vout Vin Vout Vref CE Noise Reduction Current Limit CE GND Vref Noise Reduction Current Limit Figure 2.
Simplified Schematic Block Diagram GND Table 1.
PIN FUNCTION DESCRIPTION Pin No.
SOT−23−5 Pin No.
DFN 1x1 Pin Name 1 4 VIN 2 2 GND 3 3 CE 4 NC 5 1 VOUT *EP EP Description Input pin Ground pin Chip enable pin (“H” active) Non...



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