Crystal Oscillator. Si549 Datasheet

Si549 Oscillator. Datasheet pdf. Equivalent

Part Si549
Description Crystal Oscillator
Feature Ultra Series™ Crystal Oscillator Si549 Data Sheet Ultra Low Jitter I2C Programmable XO (95 fs), 0.2.
Manufacture Silicon Laboratories
Datasheet
Download Si549 Datasheet



Si549
Ultra SeriesCrystal Oscillator
Si549 Data Sheet
Ultra Low Jitter I2C Programmable XO (95 fs), 0.2 to 1500 MHz
The Si549 Ultra Seriesoscillator utilizes Silicon Laboratories’ advanced 4th
generation DSPLL® technology to provide an ultra-low jitter, low phase noise
clock at any output frequency. The device is user-programmed via simple
I2C commands to provide any frequency from 0.2 to 1500 MHz with <1 ppb
resolution and maintains exceptionally low jitter for both integer and fraction-
al frequencies across its operating range. The Si549 offers excellent reliabili-
ty and frequency stability as well as guaranteed aging performance. On-chip
power supply filtering provides industry-leading power supply noise rejection,
simplifying the task of generating low jitter clocks in noisy systems that use
switched-mode power supplies. The Si549 has a dramatically simplified sup-
ply chain that enables Silicon Labs to ship custom frequency samples 1-2
weeks after receipt of order. Unlike a traditional XO, where a different crystal
is required for each output frequency, the Si549 uses one simple crystal and
a DSPLL IC-based approach to provide the desired output frequency. The
Si549 is factory-configurable for a wide variety of user specifications, includ-
ing startup frequency, I2C address, output format, and OE pin location/
polarity. Specific configurations are factory-programmed at time of shipment,
eliminating the long lead times associated with custom oscillators.
KEY FEATURES
• I2C programmable to any frequency from 0.2 to
1500 MHz with < 1 ppb resolution
• Ultra low jitter: 95 fs Typ RMS (12 kHz – 20 MHz)
• Configure up to 4 pin-selectable startup frequencies
• I2C interface supports 100 kbps, 400 kbps, and 1
Mbps (Fast Mode Plus)
• Excellent PSRR and supply noise immunity: –80
dBc Typ
• 3.3 V, 2.5 V and 1.8 V VDD supply operation from
the same part number
• LVPECL, LVDS, CML, HCSL, CMOS, and Dual
CMOS output options
• 3.2x5, 5x7 mm package footprints
• Samples available with 1-2 week lead times
Pin Assignments
SDA
7
OE/FS/NC 1
6 VDD
NC/OE/FS 2
5 CLK–
GND
34
8
SCL
(Top View)
CLK+
APPLICATIONS
• 100G/200G/400G OTN, coherent optics, PAM4
• 10G/40G/100G optical ethernet
• 3G-SDI/12G-SDI/24G-SDI broadcast video
• Servers, switches, storage, search acceleration
• Test and measurement
• FPGA/ASIC clocking
Pin #
1, 2
3
4
5
6
7
8
Descriptions
Selectable via ordering option
OE = Output enable; FS = Frequency Select; NC = No connect
GND = Ground
CLK+ = Clock output
CLK- = Complementary clock output. Not used for CMOS.
VDD = Power supply
SDA = I2C Serial Data
SCL = I2C Serial Clock
Fixed
Frequency
Crystal
Frequency
Flexible
DSPLL
OSC
NVM
Control
Digital
Phase
Detector
Phase Error
Cancellation
Digital
Loop
Filter
Phase Error
Fractional
Divider
Power Supply Regulation
DCO
OE, Frequency Select
(I2C and Pin Control)
Built-in Power Supply
Noise Rejection
Low
Noise
Driver
Flexible
Formats,
1.8V – 3.3V
Operation
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Rev. 1.0



Si549
Si549 Data Sheet
Ordering Guide
1. Ordering Guide
The Si549 XO supports a variety of options including startup frequency, output format, and OE pin location/polarity, as shown in the
chart below. Specific device configurations are programmed into the part at time of shipment, and samples are available in 1-2 weeks.
Silicon Laboratories provides an online part number configuration utility to simplify this process. Refer to www.silabs.com/oscillators to
access this tool and for further ordering instructions.
XO Series
549
Description
I2C Oscillator
Temp Stability
A ± 20 ppm
B ± 10 ppm
C ± 7 ppm
Total Stability 2
± 50 ppm
± 25 ppm
± 20 ppm
Package
Temperature Grade
A 5x7 mm
G
-40 to 85 °C
B 3.2x5 mm
Signal Format
LVPECL
LVDS
CMOS
CML
HCSL
Dual CMOS
(In-Phase)
Dual CMOS
(Complementary)
Custom 1
549 A A A A - - - - - - A B G R
VDD Range
2.5, 3.3 V
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
Order
Option
A
B
C
D
E
F
G
X
Code
A
B
C
Supported Frequency Range
0.2-1500 MHz
0.2-800 MHz
0.2-325 MHz (CMOS available to 250 MHz)
Code
A
B
C
D
E
F
G
H
J
OE Pin
Pin 1
Pin 1
Pin 2
Pin 2
Pin 1
Pin 1
Pin 2
Pin 2
--
Pinout Option
OE Polarity
Active High
Active Low
Active High
Active Low
Active High
Active Low
Active High
Active Low
--
FS0
(Dual)
--
--
--
--
Pin 2
Pin 2
Pin 1
Pin 1
Pin 1
FS1
(Quad)
--
--
--
--
--
--
--
--
Pin 2
Device Revision
Code
R
<Blank>
Reel
Tape and Reel
Coil Tape
Frequency
Code 3
Description
xxxxxx
The Si549 supports one, two, or
four user-defined startup
frequencies in the range
selected by the Supported
Frequency Range code. A user-
defined 7-bit I2C address is
supported. Each unique startup
configuration and I2C address
combination is assigned a 6-digit
code.
Single
Dual
Quad
Codes A, B
SDA
OE 1 7 6
VDD
Codes E, F
SDA
OE 1 7 6 VDD
Code J
SDA
FS0 1 7 6 VDD
NC 2
5 CLK– FS0 2
5 CLK– FS1 2
5 CLK–
GND 3 8 4 CLK+ GND 3 8 4 CLK+ GND 3 8 4 CLK+
SCL SCL SCL
Codes C, D
SDA
NC 1 7 6 VDD
Codes G, H
SDA
FS0 1 7 6 VDD
OE 2
5 CLK–
OE 2
5 CLK–
GND 3 8 4 CLK+
SCL
GND 3 8 4 CLK+
SCL
If replacing Si570A-K, use Code C
If replacing Si570M-W, use Code D
Notes:
1. Contact Silicon Labs for non-standard configurations.
2. Total stability includes temp stability, initial accuracy, load pulling, VDD variation, and 20 year aging at 70 °C.
3. Create custom part numbers at www.silabs.com/oscillators.
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Rev. 1.0 | 2





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