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74AUP1G32 Datasheet, Equivalent, OR gate.

Low-power 2-input OR gate

Low-power 2-input OR gate

 

 

 

Part 74AUP1G32
Description Low-power 2-input OR gate
Feature www.
DataSheet4U.
com 74AUP1G32 Low-power 2-input OR gate Rev.
01 — 2 August 2 005 Product data sheet 1.
General desc ription The 74AUP1G32 is a high-perform ance, low-power, low-voltage, Si-gate C MOS device, superior to most advanced C MOS compatible TTL families.
Schmitt-tr igger action at all inputs makes the ci rcuit tolerant to slower input rise and fall times across the entire VCC range from 0.
8 V to 3.
6 V.
This device ensur es a very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fu lly specified for partial Power-down a pplications using .
Manufacture NXP
Datasheet
Download 74AUP1G32 Datasheet
Part 74AUP1G32
Description Low-power 2-input OR gate
Feature www.
DataSheet4U.
com 74AUP1G32 Low-power 2-input OR gate Rev.
01 — 2 August 2 005 Product data sheet 1.
General desc ription The 74AUP1G32 is a high-perform ance, low-power, low-voltage, Si-gate C MOS device, superior to most advanced C MOS compatible TTL families.
Schmitt-tr igger action at all inputs makes the ci rcuit tolerant to slower input rise and fall times across the entire VCC range from 0.
8 V to 3.
6 V.
This device ensur es a very low static and dynamic power consumption across the entire VCC range from 0.
8 V to 3.
6 V.
This device is fu lly specified for partial Power-down a pplications using .
Manufacture NXP
Datasheet
Download 74AUP1G32 Datasheet

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