Power Transistor. SPD15P10PLG Datasheet

SPD15P10PLG Transistor. Datasheet pdf. Equivalent


Infineon Technologies SPD15P10PLG
SIPMOS® Power-Transistor
Features
• P-Channel
• Enhancement mode
• logic level
• Avalanche rated
• Pb-free lead plating; RoHS compliant
Qualified according to AEC Q101
Product Summary
V DS
R DS(on),max
ID
SPD15P10PL G
-100 V
0.20 :
-15 A
PG-TO252-3
Type
Package
SPD15P10PL G PG-TO252-3
Marking
15P10PL
Lead free Packing
Yes Non dry
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Gate source voltage
Power dissipation
Operating and storage temperature
I D T C=25 °C
T C=100 °C
I D,pulse T C=25 °C
E AS I D=-15 A, R GS=25 :
V GS
P tot T C=25 °C
T j, T stg
ESD Class
Soldering temperature
IEC climatic category; DIN IEC 68-1
Value
-15
11.3
-60
230
±20
128
-55 ... 175
1C (1kV to 2kV)
260 °C
55/175/56
Unit
A
mJ
V
W
°C
Rev 1.5
page 1
2012-09-03


SPD15P10PLG Datasheet
Recommendation SPD15P10PLG Datasheet
Part SPD15P10PLG
Description Power Transistor
Feature SPD15P10PLG; SIPMOS® Power-Transistor Features • P-Channel • Enhancement mode • logic level • Avalanche rated • P.
Manufacture Infineon Technologies
Datasheet
Download SPD15P10PLG Datasheet




Infineon Technologies SPD15P10PLG
Parameter
Thermal characteristics
Thermal resistance,
junction - soldering point
Thermal resistance,
junction - ambient
Symbol Conditions
SPD15P10PL G
min.
Values
typ.
Unit
max.
R thJC
R thJA
minimal footprint,
steady state
6 cm2 cooling area1),
steady state
-
-
-
- 1.17 K/W
- 75
- 45
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
Gate-source leakage current
V (BR)DSS V GS=0 V, I D=-250 mA
V GS(th)
V DS=V GS, I D=-
1.54 mA
-100
-1
-
-1.5
-V
-2
I DSS
V DS=-100 V, V GS=0 V,
T j=25 °C
-
-0.1 -1 μA
I GSS
V DS=-100 V, V GS=0 V,
T j=150 °C
V GS=-20 V, V DS=0 V
-
-
-10 -100
-10 -100 nA
Drain-source on-state resistance
R DS(on) V GS=-4.5 V, I D=-9.7 A
-
190 270 m:
Transconductance
V GS=-10 V,
I D=-11.3 A
- 140 200 m:
g fs
|V DS|>2|I D|R DS(on)max,
I D=-11.3 A
5.5
11.0
-S
1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 μm thick) copper area for drain
connection. PCB is vertical in still air.
Rev 1.5
page 2
2012-09-03



Infineon Technologies SPD15P10PLG
Parameter
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics2)
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Reverse Diode
Diode continuous forward current
Diode pulse current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Symbol Conditions
SPD15P10PL G
min.
Values
typ.
Unit
max.
C iss - 1120 1490 pF
C oss
V GS=0 V, V DS=-25 V,
f =1 MHz
-
272 362
C rss
- 120 180
t d(on)
tr
t d(off)
tf
V DD=-50 V, V GS=-
10 V, I D=-15 A,
R G=6 :
- 7.6 11 ns
- 21 31
- 50 75
- 29 44
Q gs
Q gd V DD=-80 V, I D=-15 A,
Q g V GS=0 to -10 V
V plateau
-
-
-
-
4.3 5.7 nC
17 26
47 62
4.0 - V
IS
I S,pulse
V SD
t rr
Q rr
T C=25 °C
V GS=0 V, I F=-15 A,
T j=25 °C
V R=50 V, I F=|I S|,
di F/dt =100 A/μs
- - -15 A
- - -60
- -0.96 -1.35 V
- 110 165 ns
- 450 675 nC
2) See figure 16 for gate charge parameter definition
Rev 1.5
page 3
2012-09-03





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