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ZL30119

Zarlink Semiconductor
Part Number ZL30119
Manufacturer Zarlink Semiconductor
Description Low Jitter Line Card Synchronizer
Published Jan 20, 2007
Detailed Description ZL30119 SONET/SDH OC-48/OC-192 Line Card Synchronizer Data Sheet Features Ordering Information June 2006 • Synchroni...
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ZL30119
ZL30119

Overview
ZL30119 SONET/SDH OC-48/OC-192 Line Card Synchronizer Data Sheet Features Ordering Information June 2006 • Synchronizes with standard telecom system references and synthesizes a wide variety of protected telecom line interface clocks that are compliant with Telcordia GR-253-CORE and ITU-T G.
813 • Internal APLL provides standard output clock frequencies up to 622.
08 MHz that meet jitter requirements for interfaces up to OC-192/STM-64 • Programmable output synthesizers (P0, P1) generate clock frequencies from any multiple of 8 kHz up to 77.
76 MHz in addition to 2 kHz • Provides two DPLLs which are independently configurable through a serial peripheral interface • DPLL1 provides all the features necessary for generating SONET/SDH compliant clocks including automatic hitless reference switching, automatic mode selection (locked, free-run, holdover), and selectable loop bandwidth • DPLL2 provides a comprehensive set of features for generating derived output clocks and other general purp...


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