a FEATURES 10 ps Delay Resolution 2.
5 ns to 10 ␮ s Full-Scale Range Fully Differential Inputs Separate Trigger and Reset Inputs Low Power Dissipation—310 mW MIL-STD-883 Compliant Versions Available APPLICATIONS ATE Pulse Deskewing Arbitrary Waveform Generators High Stability Timing Source Multiple Phase Clock Generators TRIGGER TRIGGER RESET RESET Digitally Programmable Delay Generator AD9500 FUNCTIONAL BLOCK DIAGRAM CEXT +VS CS ECL COMMON AD9500 DIFFERENTIAL ANALOG INPUT STAGE ECL VOLTAGE REFERENCE TIMING CONTROL CIRCUIT Q Q INTERNAL DAC QR TTL LATCHES ECLREF RS REFERENCE CURRENT RSET –VS GROUND D0 D1 D2 D3 D4 D5 D6 D7 (LSB) (MSB) LATCH OFFSET ENABLE ADJUST GENERAL DESCRIPTION –VS ...

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