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AD9511

Analog Devices
Part Number AD9511
Manufacturer Analog Devices
Description 1.2 GHz Clock Distribution IC
Published Jan 24, 2006
Detailed Description 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs AD9511 FEATURES Low phase noise phase-loc...
Datasheet PDF File AD9511 PDF File

AD9511
AD9511


Overview
1.
2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs AD9511 FEATURES Low phase noise phase-locked loop core Reference input frequencies to 250 MHz Programmable dual-modulus prescaler Programmable charge pump (CP) current Separate CP supply (VCPS) extends tuning range Two 1.
6 GHz, differential clock inputs 5 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 3 independent 1.
2 GHz LVPECL outputs Additive output jitter 225 fs rms 2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs Additive output jitter 275 fs rms Fine delay adjust on 1 LVDS/CMOS output Serial control port Space-saving 48-lead LFCSP APPLICATIONS Low jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers High performance instrumentation Broadband infrastructure GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core.
The design emphasizes low jitter and phase noise to maximize data converter performance.
Other applications with demanding phase noise and jitter requirements also benefit from this part.
The PLL section consists of a programmable reference divider (R); a low noise phase frequency detector (PFD); a precision charge pump (CP); and a programmable feedback divider (N).
By connecting an external VCXO or VCO to the CLK2/CLK2B pins, frequencies up to 1.
6 GHz may be synchronized to the input reference.
There are five independent clock outputs.
Three outputs are LVPECL (1.
2 GHz), and two are selectable as either LVDS (800 MHz) or CMOS (250 MHz) levels.
REFIN REFINB FUNCTION CLK1 CLK1B SCLK SDIO SDO CSB FUNCTIONAL BLOCK DIAGRAM VS GND RSET CPRSET VCP DISTRIBUTION REF AD9511 SYNCB, RESETB PDB R DIVIDER N DIVIDER PHASE FREQUENCY DETECTOR PLL REF CHARGE PUMP PLL SETTINGS SERIAL CONTROL PORT PROGRAMMABLE DIVIDERS AND PHASE ADJUST /1, /2, /3.
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/31, /32 LVPECL /1, /2, /3.
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/3...



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