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CXL5002M

Part Number	CXL5002M
Manufacturer	Sony Corporation
Description	CMOS-CCD 1/2H Delay Line for NTSC
Published	Mar 27, 2005
Detailed Description	CXL5002M/P CMOS-CCD 1/2H Delay Line for NTSC Description The CXL5002M/P are general-purpose CMOS-CCD delay line ICs that...
Datasheet	CXL5002M PDF File

Overview

CXL5002M/P CMOS-CCD 1/2H Delay Line for NTSC Description The CXL5002M/P are general-purpose CMOS-CCD delay line ICs that provide 1/2H delay time for NTSC.
Features • Low power consumption 70mW (Typ.
) • Small size package (8-pin SOP, DIP) • Low differential gain DG = 3% (Typ.
) • Input signal amplitude 180 IRE (= 1.
28Vp-p, Max.
) • Low input clock amplitude operation 150mVp-p (Min.
) • Built-in peripheral circuits (clock driver, timing generator, autobias, and output circuits) Functions • 340-bit CCD register • Clock drivers • Autobias circuit • Sync tip clamp circuit • Sample and hold circuit Structure CMOS-CCD Absolute Maximum Ratings (Ta = 25°C) • Supply voltage VDD 11 V • Supply voltage VCL 6 V • Operating temperature Topr –10 to +60 °C • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation PD CXL5002M 350 mW CXL5002P 480 mW Recommended Operating Conditions Supply voltage VDD 9 ± 5% V VCL 5 ± 5% V Recommended Clock Conditions • Input clock amplitude VCK 150mVp-p to 1.
0Vp-p (250mVp-p typ.
) • Clock frequency fCK 10.
7MHz Sony reserves the right to change products and specifications without prior notice.
This information does not convey any license by any implication or otherwise under any patents or other right.
Application circuits shown, if any, are typical examples illustrating the operation of the devices.
Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXL5002M 8 pin SOP (Plastic) CXL5002P 8 pin DIP (Plastic) –1– E50586B79-PS CXL5002M/P Blook Diagram AUTO FEED OUT 5 ref.
(1 BIT) CLAMP CIRCUIT 340-BIT SHIFT REGISTER φ1 φ2 AMP S/H φ1 AMP φ2 AMP DUTY CONTROL CIRCUIT 4 IN 8 7 6 AUTO BIAS CIRCUIT CLOCK DRIVERS 1 2 3 VSS VCL Pin Description Pin No.
Symbol 1 2 3 4 VSS VCL CLK VDD Description GND 5V power supply Clock input 9V power supply > 100k Impedance [Ω] Pin No.
Symbol 5 6 7 8 OUT FEED Description Signal output Impedance [Ω] 600 to 1k CLK Feedback DC output > 100k 10k > 100k AUTO Auto...

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