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CXL5005M

Sony Corporation
Part Number CXL5005M
Manufacturer Sony Corporation
Description CMOS-CCD 1H Delay Line for NTSC with PLL
Published Mar 27, 2005
Detailed Description CXL5005M/P CMOS-CCD 1H Delay Line for NTSC with PLL Description The CXL5005M/P are general-purpose CCD delay line ICs wh...
Datasheet PDF File CXL5005M PDF File

CXL5005M
CXL5005M


Overview
CXL5005M/P CMOS-CCD 1H Delay Line for NTSC with PLL Description The CXL5005M/P are general-purpose CCD delay line ICs which provide 1H delay time of NTSC.
Features • Low power consumption 90mW (Typ.
) • Small size package (14-pin SOP, DIP) • Low differential gain DG = 3% (Typ.
) • Input signal ampiitude 180 IRE (= 1.
28Vp-p, max.
) • Low input clock amplitude operation 200mVp-p (Min.
) • Built-in triple PLL circuit • Built-in peripheral circuits (clock driver, timing generator, auto-bias and output circuits) Functions • 680-bit CCD register • Clock drivers • Autobias circuit • Sync tip clamp circuit • Sample-and-hold circuit • PLL (triple) Structure CMOS-CCD Absolute Maximum Ratings (Ta = 25°C) 11 V • Supply voltage VDD 6 V • Supply voltage VCL • Operating temperature Topr –10 to +60 °C • Storage temperature Tstg –55 to +150 °C • Allowable power dissipation PD CXL5005M 400 mW CXL5005P 800 mW Recommended Operating Conditions Supply voltage VDD 9 ± 5% V 5 ± 5% V VCL Recommended Clock Conditions • Input clock amplitude VCLK 200mVp-p to 1.
0Vp-p (300mVp-p typ.
) • Clock frequency fCLK 3.
579545MHz Sony reserves the right to change products and specifications without prior notice.
This information does not convey any license by any implication or otherwise under any patents or other right.
Application circuits shown, if any, are typical examples illustrating the operation of the devices.
Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXL5005M 14 pin SOP (Plastic) CXL5005P 14 pin DIP (Plastic) –1– E88Z40A79-PS CXL5005M/P Blook Diagram and Pin configuration AUTO FEED OUT CLK VCL 8 7 IN 14 13 Auto-bias circuit NC 12 11 Output & S/H (1 BIT) 10 9 Phase comparator Clamp circuit 680 bit shift register φ1 φ2 1/3 counter VCO Clock driver 1 2 3 4 5 6 VCOIN VCL VDD VSS PCOUT NC Pin Description Pin No.
Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VSS VCL VCOIN VDD PCOUT NC VCOOUT VCL CLK NC OUT FEED AUTO IN Signal outp...



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