DatasheetsPDF.com

74ACT823

Fairchild Semiconductor
Part Number 74ACT823
Manufacturer Fairchild Semiconductor
Description 9-Bit D-Type Flip-Flop
Published Apr 3, 2005
Detailed Description 74ACT823 9-Bit D-Type Flip-Flop July 1988 Revised September 2000 74ACT823 9-Bit D-Type Flip-Flop General Description T...
Datasheet PDF File 74ACT823 PDF File

74ACT823
74ACT823


Overview
74ACT823 9-Bit D-Type Flip-Flop July 1988 Revised September 2000 74ACT823 9-Bit D-Type Flip-Flop General Description The ACT823 is a 9-bit buffered register.
It features Clock Enable and Clear which are ideal for parity bus interfacing in high performance microprogramming systems.
The ACT823 offers noninverting outputs.
Features s Outputs source/sink 24 mA s 3-STATE outputs for bus interfacing s Inputs and outputs are on opposite sides s TTL compatible inputs Ordering Code: Order Number 74ACT823SC 74ACT823MTC 74ACT823SPC Package Number M24B MTC24 N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.
300 Wide 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.
4mm Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300 Wide Device also available in Tape and Reel.
Specify by appending suffix letter “X” to the ordering code.
(SPC not available in Tape and Reel.
) Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names D0–D8 O0–O8 OE CLR CP EN Description Data Inputs Data Outputs Output Enable Clear Clock Input Clock Enable FACT is a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS009894 www.
fairchildsemi.
com 74ACT823 Functional Description The ACT823 consists of nine D-type edge-triggered flipflops.
These have 3-STATE outputs for bus systems organized with inputs and outputs on opposite sides.
The buffered clock (CP) and buffered Output Enable (OE) are common to all flip-flops.
The flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH CP transition.
With OE LOW, the contents of the flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high impedance state.
Operation of the OE input does not affect the state of the flip-flops.
In addition to the Clock and Output Enable pins, there are Clear (CLR) and Clock Enable (EN) pins.
These ...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)