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MK2049-34

Part Number	MK2049-34
Manufacturer	Integrated Circuit Systems
Description	3.3 V Communications Clock PLL
Published	May 7, 2005
Detailed Description	MK2049-34 3.3 V Communications Clock PLL Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer ...
Datasheet	MK2049-34 PDF File

Overview

MK2049-34 3.
3 V Communications Clock PLL Description The MK2049-34 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies.
With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other communications frequencies.
This allows for the generation of clocks frequency-locked and phase-locked to an 8 kHz backplane clock, simplifying clock synchronization in communications systems.
The MK2049-34 can also accept a T1 or E1 input clock and provide the same output for loop timing.
All outputs are frequency locked together and to the input.
This part also has a jitter-attenuated Buffer capability.
In this mode, the MK2049-34 is ideal for filtering jitter from 27 MHz video clocks or other clocks with high jitter.
ICS/MicroClock can customize these devices for many other different frequencies.
Contact your ICS/MicroClock representative for more details.
Features • Packaged in 20 pin SOIC • 3.
3 V ±5% operation • Fixed I...

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