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MK2049-35

Part Number	MK2049-35
Manufacturer	Integrated Circuit Systems
Description	3.3 V Communications Clock PLL
Published	May 7, 2005
Detailed Description	MK2049-35 3.3 V Communications Clock PLL Description The MK2049-35 is a Phase-Locked Loop (PLL) based clock synthesizer ...
Datasheet	MK2049-35 PDF File

Overview

MK2049-35 3.
3 V Communications Clock PLL Description The MK2049-35 is a Phase-Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies.
With an 8 kHz clock input as a reference, the MK2049-35 generates T1, E1, T3, E3, OC3/3, Gigabit Ethernet, and other communications frequencies.
This allows for the generation of clocks frequency-locked to an 8 kHz backplane clock, simplifying clock synchronization in communications systems.
This part also has a jitter-attenuated Buffer capability.
In this mode, the MK2049-35 is ideal for filtering jitter from with high jitter clocks.
ICS/MicroClock can customize these devices for many other different frequencies.
Contact your ICS/MicroClock representative for more details.
Features • Packaged in 20 pin SOIC • 3.
3 V ±5% operation • Meets the TR62411, ETS300 011, and GR-1244 specification for MTIE, Pull-in/Hold-in Range, Phase Transients, and Jitter Generation for Stratum 3, 4, and 4E • Accepts multiple inputs: 8 kHz backplane ...

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