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MPC9443

Part Number	MPC9443
Manufacturer	Motorola
Description	2.5V AND 3.3V LVCMOS CLOCK FANOUT BUFFER
Published	Jan 15, 2006
Detailed Description	MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9443/D Rev 2, 05/2002 2.5V and ...
Datasheet	MPC9443 PDF File

Overview

MOTOROLA Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9443/D Rev 2, 05/2002 2.
5V and 3.
3V LVCMOS Clock Fanout Buffer The MPC9443 is a 2.
5V and 3.
3V compatible 1:16 clock distribution buffer designed for low-voltage high-performance telecom, networking and computing applications.
The device supports 3.
3V, 2.
5V and dual supply voltage (mixed-voltage) applications.
The MPC9443 offers 16 low-skew outputs which are divided into 4 individually configurable banks.
Each output bank can be individually supplied by 2.
5V or 3.
3V, individually set to run at 1X or 1/2X of the input clock frequency or be disabled (logic low output state).
Two selectable LVPECL compatible inputs support differential clock distribution systems.
In addition, one selectable LVCMOS input is provided for LVCMOS clock distribution systems.
The MPC9443 is specified for the extended temperature range of –40 to +85°C.
Features • Configurable 16 outputs LVCMOS clock distribution buffer MPC9443 LOW VOLTAGE SUPPLY 2.
5V AND 3.
3V LVCMOS CLOCK FANOUT BUFFER Freescale Semiconductor, Inc.
.
.
• Compatible to single, dual and mixed 3.
3V/2.
5V voltage supply • Output clock frequency up to 350 MHz • Designed for high-performance telecom, networking and computer applications • Supports applications requiring clock redundancy FA SUFFIX 48–LEAD LQFP PACKAGE CASE 932–03 • • • • • • Max.
output skew of 250 ps (125 ps within one bank) Selectable output configurations per output bank Individually per-bank high–impedance tristate Output disable (stop in logic low state) control 48 ld LQFP package Ambient operating temperature range of –40 to 85°C Functional Description The MPC9443 is a full static design supporting clock frequencies up to 350 MHz.
The signals are generated and retimed on-chip to ensure minimal skew between the four output banks.
Two independent LVPECL compatible clock inputs are available.
This feature supports redundant differential clock sources.
In addition, the MPC...

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