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CY7C007A

Cypress Semiconductor
Part Number CY7C007A
Manufacturer Cypress Semiconductor
Description (CY7C006A - CY7C017A) Dual Port Static RAM
Published Feb 26, 2006
Detailed Description CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM Features • True dual-ported memory cells which all...
Datasheet PDF File CY7C007A PDF File

CY7C007A
CY7C007A

Overview
CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • 16K x 8 organization (CY7C006A) w w • 32K x 8 organization (CY7C007A) • 16K x 9 organization (CY7C016A) • 32K x 9 organization (CY7C017A) • 0.
35-micron CMOS for optimum speed/power • High-speed access: 12[1]/15/20 ns • Low operating power — Active: ICC = 180 mA (typical) — Standby: ISB3 = 0.
05 mA (typical) • Fully asynchronous operation w .
D at h S a t e e 4U .
m o c CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x8, 32K/16K x9 Dual-Port Static RAM • Automatic power-down • Expandable data bus to 16/18 bits or more using Master/Slave chip select when using more than one device • On-chip arbitration logic • Semaphores included to permit software handshaking between ports • INT flags for port-to-port communication • Pin select for Master or Slave • Commercial temperature range • Available in 68-pin PLCC (CY7C006A, CY7C007A and CY7C017A), 64-pin TQFP (CY7C006A), and in 80-pin TQFP (CY7C007A and CY7C016A) Logic Block Diagram R/WL CEL OEL I/O0L–I/O7/8L [2] 8/9 [4] A0L–A13/14L 14/15 [4] A0L–A13/14L CEL OEL R/WL SEML w w w Address Decode 14/15 .
D t a I/O Control S a e h t e U 4 .
c m o R/WR CER OER 8/9 [2] I/O Control I/O0R–I/O7/8R True Dual-Ported RAM Array Address Decode 14/15 14/15 A0R–A13/14R [4] Interrupt Semaphore Arbitration BUSYL INTL [3] For the most recent information, visit the Cypress web site at www.
cypress.
com Notes: 1.
See page 7 for Load Conditions.
2.
I/O0–I/O7 for x8 devices; I/O0–I/O8 for x9 devices.
3.
BUSY is an output in master mode and an input in slave mode.
4.
A0–A13 for 16K; A0–A14 for 32K devices.
M/S Cypress Semiconductor Corporation Document #: 38-06045 Rev.
*C • 3901 North First Street • San Jose w w • w .
D at h S a t e e [3] A0R–A13/14R CER OER R/WR SEMR BUSYR INTR [4] 4U .
m o c CA 95134 • 408-943-2600 Revised ...


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