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LH540245

Part Number	LH540245
Manufacturer	Sharp Electrionic Components
Description	2048 x 18 / 4096 x 18 Synchronous FIFOs
Published	Mar 22, 2005
Detailed Description	LH540235/45 FEATURES • Fast Cycle Times: 20/25/35 ns • Pin-Compatible Drop-In Replacements for IDT72235B/45B FIFOs 2048...
Datasheet	LH540245 PDF File

Overview

LH540235/45 FEATURES • Fast Cycle Times: 20/25/35 ns • Pin-Compatible Drop-In Replacements for IDT72235B/45B FIFOs 2048 × 18 / 4096 × 18 Synchronous FIFOs • May be Cascaded for Increased Depth, or Paralleled for Increased Width • 16 mA-IOL High-Drive Three-State Outputs • Five Status Flags: Full, Almost-Full, Half-Full, Almost-Empty, and Empty; ‘Almost’ Flags are Programmable • Choice of IDT-Compatible or Enhanced Operating Mode; Selected by an Input Control Signal • Device Comes Up into One of Two Known Default States at Reset Depending on the State of the EMODE Control Input: Programming is Allowed, but is not Required • In Enhanced Operating Mode, Almost-Full, Half-Full, and Almost-Empty Flags can be Made Completely Synchronous • In Enhanced Operating Mode, Duplicate Enables for Interlocked Paralleled FIFO Operation, for 36-Bit Data Width, when Selected and Appropriately Connected • Internal Memory Array Architecture Based on CMOS • ‘Synchronous’ Enable-Plus-Clock Control at Both Input Port and Output Port Dual-Port SRAM Technology, 2048 × 18 or 4096 × 18 • In Enhanced Operating Mode, Disabling Three-State Outputs May be Made to Suppress Reading • Independently-Synchronized Operation of Input Port and Output Port • Control Inputs Sampled on Rising Clock Edge • Most Control Signals Assertive-LOW for Noise Immunity • Data Retransmit Function • TTL/CMOS-Compatible I/O • Space-Saving 68-Pin PLCC Package; Even-Smaller 64-Pin TQFP Package RS RESET LOGIC FL/RT WXI/WEN2 WXO/HF RXI/REN2 RXO/EF2 EXPANSION LOGIC FIFO MEMORY ARRAY 2048 x 18/4096 x 18 WRITE POINTER WCK WEN WXI/WEN2 READ POINTER RCK OUTPUT PORT CONTROL LOGIC REN RXI/REN2 INPUT PORT CONTROL LOGIC FF PAF WXO/HF INPUT PORT DEDICATED AND PROGRAMMABLE STATUS FLAGS OUTPUT PORT PROGRAMMABLE REGISTERS EF PAE RXO/EF2 OE Q0 - Q17 D0 - D17 LD EMODE BOLD ITALIC = Enhanced Operating Mode.
540235-1 Figure 1.
LH540235/45 Block Diagram BOLD ITALIC = Enhanced Operating Mode 1 LH540235/45 2048 x 18/...

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