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MK2049-45

3.3V Communications Clock PLL

Description

MK2049-45 3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop (PLL) device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input jitter. The second PLL is a translator for frequency multiplication. Basic configuration is ...

Integrated Circuit Systems

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