3A DDR TERMINATION REGULATOR
Preliminary Datasheet 3A DDR TERMINATION REGULATOR General Description The AP2302 linear regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM. The regulator can sink or source up to 3A current continuously, offers enough current for most DDR applications. Output voltage is designed to track the reference volta...
BCD Semiconductor