Preliminary Datasheet 1.
5A DDR TERMINATION
REGULATOR General Description
The AP2301 linear
regulator is designed to meet the JEDEC specification SSTL-2 and SSTL-18 for termination of DDR-SDRAM.
The
regulator can sink or source up to 1.
5A current continuously, offers enough current for most DDR applications.
Output voltage is designed to track the reference voltage within a 2% tolerance for load regulation while preventing shooting through on the output stage.
On-chip thermal limiting provides protection against a combination of high current and ambient temperature which would create an excessive junction temperature.
The AP2301, used in conjunction with series termination resistors, provides...