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PI6LC4833

Part Number	PI6LC4833
Manufacturer	Pericom Semiconductor
Description	Clock Generator
Published	May 13, 2016
Detailed Description	Features ÎÎ 2.5/3.3V supply voltage ÎÎ4 HCSL 100/125/200/250MHz outputs with OE ÎÎ2 LVCMOS 33/50/66/100MHz selectable ou...
Datasheet	PI6LC4833 PDF File

Overview

Features ÎÎ 2.
5/3.
3V supply voltage ÎÎ4 HCSL 100/125/200/250MHz outputs with OE ÎÎ2 LVCMOS 33/50/66/100MHz selectable outputs ÎÎ5 LVCMOS 25MHz or 125MHz outputs ÎÎ1 LVPECL 312.
5MHz, 156.
25MHz or 125MHz output ÎÎ1 CMOS 156.
25MHz or 125MHz output ÎÎ1 LVPECL 125MHz or 25MHz output ÎÎ25MHz crystal or differential input ÎÎ0.
5ps (typ) RMS integrated phase noise design at 3.
3V operation ÎÎ1.
0ps (typ) RMS integrated phase noise design at 2.
5V operation ÎÎPLL Bypass mode for test ÎÎIndustrial Temperature -40°C to 85°C ÎÎTQFN - 56 package Pin Configuration (56-Pin TQFN) PI6LC4833 Clock Generator for Power PC Description The PI6LC4833 implements Pericom's advanced LC VCO technology and is specifically designed for Power PC network processor (Freescale MPC8548, MPC8572, AMCC 460, AMI732).
This high performance device is optimized to generate CPU core/ PCI clock, high performance PCIe Gen1/2 Clock, SRIO, Gigabit Ethernet’s MAC and PHY clock.
All outputs are generated from 25MHz external clock input or crystal.
Application ÎÎRouter/Switch ÎÎOLT, BSC, WLAN, Wireless gateway ÎÎWireless IREF QA0+ QA0VCCA QA1+ QA1- GND QA2+ QA2VCCA QA3+ QA3GND VDDA1 OC-B FB0 FB1 VCCB QB0 QB1 VDD_OSC X1 X2 IN+ ININ_Sel OC-R Sel_Freq2 56 55 54 53 52 51 50 49 48 47 46 45 44 43 1 42 2 41 3 40 4 39 5 38 6 37 7 8 GND 36 35 9 34 10 33 11 32 12 31 13 30 14 29 15 16 17 18 19 20 21 22 23 24 25 26 27 28 FA1 FA0 OC-A SS1 SS0 PLL_BYPS VSEL_33 VCCC1 QC1 VCCC0 QC0QC0+ SEL_FREQ3 QC-C VccD QD2 QD1 Sel_Freq1 QD0QD0+ VDD_PLL2 VDDA2 GND VCCR Qref2 Qref1 Qref0 VccR All trademarks are property of their respective owners.
11-0074 1 www.
pericom.
com P-0.
1 06/14/11 Block Diagram PI6LC4833 Clock Generator for Power PC FB0 FB1 SS1 SS0 I ref F A1 F A0 IN_Sel X1 X2 IN+ IN- OSC Diff MUX PLL_BYPS OC_A OC_B OC_C OC_R VSEL_33 Divider Ring PLL1 Divider LC PLL2 Divider S Sel-Freq3 Divider IN1 IN2 S IN1 IN2 S Sel-Freq1 Sel-Freq2 PLL-BYPS QA3+ QA3QA2+ QA2QA1+ QA1QA0+ QA0- QB0 /QB1 PLL-BYPS PL...

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