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BST100

NXP
Part Number BST100
Manufacturer NXP
Description P-channel transistor
Published Mar 23, 2005
Detailed Description DISCRETE SEMICONDUCTORS DATA SHEET BST100 P-channel enhancement mode vertical D-MOS transistor Product specification Fi...
Datasheet PDF File BST100 PDF File

BST100
BST100

Overview
DISCRETE SEMICONDUCTORS DATA SHEET BST100 P-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor DESCRIPTION P-channel vertical D-MOS transistor TO-92 variant envelope and intended for use in relay, high-speed and line-transformer drivers.
FEATURES • Very low RDS(on) • Direct interface to C-MOS • High-speed switching • No second breakdown QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance −ID = 200 mA; −VGS = 10 V Transfer admittance −ID = 200 mA; −VDS = 15 V PINNING - TO-92 VARIANT 1 2 3 = source = gate = drain  Yfs typ.
RDS(on) −VDS ±VGSO −ID Ptot BST100 max.
max.
max.
max.
typ.
max.
60 V 20 V 0.
3 A 1 W 4,5 Ω 6 Ω 200 mS PIN CONFIGURATION handbook, halfpage d 1 2 3 g MAM144 s Note: various pinout configurations available.
Fig.
1 Simplified outline and symbol.
April 1995 2 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tamb = 25 °C (note 1) Storage temperature range Junction temperature THERMAL RESISTANCE From junction to ambient (note 1) Note 1.
Transistor mounted on printed-circuit board, max.
lead length 4 mm, mounting pad for drain lead min.
10 mm x 10 mm.
Rth j-a = −VDS ±VGSO BST100 max.
max.
max.
max.
max.
max.
60 V 20 V 0.
3 A 0.
8 A 1 W 150 °C −ID −IDM Ptot Tstg Tj −65 to + 150 °C 125 K/W April 1995 3 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor CHARACTERISTICS Tj = 25 °C unless otherwise specified Drain-source breakdown voltage −ID = 10 µA; VGS = 0...


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