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K4S561632A

Part Number	K4S561632A
Manufacturer	Samsung semiconductor
Description	256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL
Published	Apr 7, 2005
Detailed Description	K4S561632A CMOS SDRAM 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 Sep. 1999 * Samsung Ele...
Datasheet	K4S561632A PDF File

Overview

K4S561632A CMOS SDRAM 256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL Revision 0.
0 Sep.
1999 * Samsung Electronics reserves the right to change products or specification without notice.
Rev.
0.
0 Sep.
1999 K4S561632A 4M x 16Bit x 4 Banks Synchronous DRAM FEATURES • JEDEC standard 3.
3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -.
CAS latency (2 & 3) -.
Burst length (1, 2, 4, 8 & Full page) -.
Burst type (Sequential & Interleave) • All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation • DQM for masking • Auto & self refresh • 64ms refresh period (8K Cycle) CMOS SDRAM GENERAL DESCRIPTION The K4S561632A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology.
Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
ORDERING INFORMATION Part No.
K4S561632A-TC/L75 K4S561632A-TC/L80 K4S561632A-TC/L1H K4S561632A-TC/L1L Max Freq.
133MHz(CL=3) 125MHz(CL=3) 100MHz(CL=2) 100MHz(CL=3) LVTTL 54pin TSOP(II) Interface Package FUNCTIONAL BLOCK DIAGRAM I/O Control LWE LDQM Data Input Register Bank Select 4M x 16 Sense AMP 4M x 16 4M x 16 4M x 16 Refresh Counter Output Buffer Row Decoder Row Buffer DQi Address Register CLK ADD Column Decoder Col.
Buffer Latency & Burst Length LRAS LCBR LCKE LRAS LCBR LWE LCAS Timing Register Programming Register LWCBR LDQM CLK CKE CS RAS CAS WE L(U)DQM * Samsung Electronics reserves the right to change products or specification without notice.
Rev.
0.
0 Sep.
1999 K4S561632A PIN CONFIGURATION (Top view) VDD DQ...

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