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74LV86

Philips
Part Number 74LV86
Manufacturer Philips
Description Quad 2-input EXCLUSIVE-OR gate
Published Apr 23, 2005
Detailed Description INTEGRATED CIRCUITS 74LV86 Quad 2-input EXCLUSIVE-OR gate Product specification Supersedes data of 1997 Feb 03 IC24 Dat...
Datasheet PDF File 74LV86 PDF File

74LV86
74LV86

Overview
INTEGRATED CIRCUITS 74LV86 Quad 2-input EXCLUSIVE-OR gate Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 20 Philips Semiconductors Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 FEATURES • Wide Operating voltage: 1.
0 to 5.
5 V • Optimized for low voltage applications: 1.
0 to 3.
6 V • Accepts TTL input levels between VCC = 2.
7 V and VCC = 3.
6 V • Typical VOLP (output ground bounce) < 0.
8 V at VCC = 3.
3 V, • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.
3 V, • Output capability: standard • ICC category: SSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.
5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA, nB to nY Input capacitance Power dissipation capacitance per gate Tamb = 25°C Tamb = 25°C DESCRIPTION The 74LV86 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT86.
The 74LV86 provides the 2-input EXCLUSIVE-OR function.
CONDITIONS CL = 15 pF; VCC = 3.
3 V VI = GND to VCC1 TYPICAL 11 3.
5 30 UNIT ns pF pF NOTE: 1.
CPD is used to determine the dynamic power dissipation (PD in µW) fo) where: PD = CPD × VCC2 × fi )ȍ (CL × VCC2 fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; ȍ (CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C OUTSIDE NORTH AMERICA 74LV86 N 74LV86 D 74LV86 DB 74LV86 PW NORTH AMERICA 74LV86 N 74LV86 D 74LV86 DB 74LV86PW DH PKG.
DWG.
# SOT27-1 SOT108-1 SOT337-1 SOT402-1 PIN CONFIGURATION 1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4B 4A 4Y 3B 3A 3Y LOGIC SYMBOL (IEEE/IEC) 1 2 =1 3 4 5 =1 6 9 10 =1 8 12 =1 SV00481 11 13 SV00479 1998 Apr 20 2 853–1892 19255 Philips Semiconductors Product specification Quad 2-input EXCLUSI...


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