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NDS9956A

Fairchild
Part Number NDS9956A
Manufacturer Fairchild
Description Dual N-Channel MOSFET
Published May 12, 2005
Detailed Description February 1996 NDS9956A Dual N-Channel Enhancement Mode Field Effect Transistor General Description These N-Channel enh...
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NDS9956A
NDS9956A


Overview
February 1996 NDS9956A Dual N-Channel Enhancement Mode Field Effect Transistor General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology.
This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage applications such as DC/DC conversion and DC motor control where fast switching, low in-line power loss, and resistance to transients are needed.
Features 3.
7A, 30V.
RDS(ON) = 0.
08Ω @ VGS = 10V High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________ 5 4 3 2 1 6 7 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed T A= 25°C unless otherwise noted NDS9956A 30 ± 20 (Note 1a) Units V V A ± 3.
7 ± 15 2 Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) W 1.
6 1 0.
9 -55 to 150 °C TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W © 1997 Fairchild Semiconductor Corporation NDS9956A.
SAM Electrical Characteristics (TA = 25°C unless otherwise noted) Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate - Body Leakage, Forward Gate - Body Leakage, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Conditions VGS = 0 V, ID = 250 µA VDS = 24 V, VGS = 0 V TJ = 55°C VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VG...



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