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HEF4044B

NXP
Part Number HEF4044B
Manufacturer NXP
Description Quadruple R/S latch
Published Mar 23, 2005
Detailed Description INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family ...
Datasheet PDF File HEF4044B PDF File

HEF4044B
HEF4044B


Overview
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4044B MSI Quadruple R/S latch with 3-state outputs Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Quadruple R/S latch with 3-state outputs HEF4044B MSI The HEF4044B is a quadruple R/S latch with 3-state outputs with a common output enable input (EO).
Each latch has an active LOW set input (S0 to S3), an active LOW reset input (R0 to R3) and an active HIGH 3-state output (O0 to O3).
When EO is HIGH, the state of the latch output (On) can be determined from the function table below.
When EO is LOW, the latch outputs are in the high impedance OFF-state.
EO does not affect the state of the latch.
Fig.
2 Pinning diagram.
The high impedance off-state feature allows common busing of the outputs.
HEF4044BP(N): 16-lead DIL; plastic (SOT38-1) HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4044BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING EO S0 to S3 R0 to R3 O0 to O3 common output enable input set inputs (active LOW) reset inputs (active LOW) 3-state buffered latch outputs FUNCTION TABLE INPUTS EO L H H H Notes 1.
H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial Z = high impedance OFF-state Fig.
1 Functional diagram.
FAMILY DATA, IDD LIMITS category MSI See Family Specifications Sn X L X H Rn X H L H OUTPUT On Z H L latched January 1995 2 Philips Semiconductors Product specification Quadruple R/S latch with 3-state outputs HEF4044B MSI Fig.
4 Logic diagram (one latch).
Fig.
3 Logic diagram.
January 1995 3 Philips Semiconductors Product specification Quadruple R/S latch with 3-state outputs AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD ...


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